HD64F3664H Renesas Electronics America, HD64F3664H Datasheet - Page 395

• Manufacturer Part Number: HD64F3664H
• Description: IC H8 MCU FLASH 32K 64QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3664H

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SCI
• Peripherals: PWM, WDT
• Number Of I /o: 29
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

A.3
The status of execution for each instruction of the H8/300H CPU and the method of calculating
the number of states required for instruction execution are shown below. Table A.4 shows the
number of cycles of each type occurring in each instruction, such as instruction fetch and data
read/write. Table A.3 shows the number of states required for each cycle. The total number of
states required for execution of an instruction can be calculated by the following expression:
Examples: When instruction is fetched from on-chip ROM, and an on-chip RAM is accessed.
From table A.4:
From table A.3:
Number of states required for execution = 2 × 2 + 2 × 2 = 8
When instruction is fetched from on-chip ROM, branch address is read from on-chip ROM, and
on-chip RAM is used for stack area.
From table A.4:
From table A.3:
Number of states required for execution = 2 × 2 + 1 × 2+ 1 × 2 = 8
BSET #0, @FF00
I = L = 2,
S
JSR @@ 30
I = 2,
S
I
I
= 2,
= S
Number of Execution States
Execution states = I × S
J
= S
J = K = 1,
S
K
L
= 2
= 2
J = K = M = N= 0
L = M = N = 0
I
+ J × S
J
+ K × S
K
+ L × S
L
+ M × S
Rev. 6.00 Mar. 24, 2006 Page 365 of 412
M
+ N × S
N
REJ09B0142-0600
Appendix