HD64F3664H Renesas Electronics America, HD64F3664H Datasheet - Page 253

• Manufacturer Part Number: HD64F3664H
• Description: IC H8 MCU FLASH 32K 64QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3664H

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SCI
• Peripherals: PWM, WDT
• Number Of I /o: 29
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

14.5.5
Figure 14.14 shows a sample flowchart for simultaneous serial transmit and receive operations.
The following procedure should be used for simultaneous serial data transmit and receive
operations. To switch from transmit mode to simultaneous transmit and receive mode, after
checking that the SCI3 has finished transmission and the TDRE and TEND flags are set to 1, clear
TE to 0. Then simultaneously set TE and RE to 1 with a single instruction. To switch from receive
mode to simultaneous transmit and receive mode, after checking that the SCI3 has finished
reception, clear RE to 0. Then after checking that the RDRF and receive error flags (OER, FER,
and PER) are cleared to 0, simultaneously set TE and RE to 1 with a single instruction.
Figure 14.14 Sample Flowchart of Simultaneous Serial Transmit and Receive Operations
Simultaneous Serial Data Transmission and Reception
Yes
No
No
Clear TE and RE bits in SCR to 0
Start transmission/reception
Write transmit data to TDR
Read receive data in RDR
Read RDRF flag in SSR
Read TDRE flag in SSR
Read OER flag in SSR
All data received?
RDRF = 1
TDRE = 1
OER = 1
<End>
Yes
Yes
No
No
(Clocked Synchronous Mode)
Error processing
Yes
[1]
[2]
[3]
[4]
Section 14 Serial Communication Interface 3 (SCI3)
[1] Read SSR and check that the TDRE
[2] Read SSR and check that the RDRF
[3] To continue serial transmission/
[4] If an overrun error occurs, read the
For overrun error processing, see
flag is set to 1, then write transmit
data to TDR.
TDRE flag is automatically cleared
to 0.
flag is set to 1, then read the receive
data in RDR.
RDRF flag is automatically cleared
to 0.
reception, before the MSB (bit 7) of
the current frame is received, finish
reading the RDRF flag, reading
RDR. Also, before the MSB (bit 7)
of the current frame is transmitted,
read 1 from the TDRE flag to confirm
that writing is possible. Then write
data to TDR.
TDRE flag is automatically cleared
to 0. When data is read from RDR,
the RDRF flag is automatically
cleared to 0.
OER flag in SSR, and after
performing the appropriate error
processing, clear the OER flag to 0.
Transmission/reception cannot be
resumed if the OER flag is set to 1.
figure 14.13.
Rev. 6.00 Mar. 24, 2006 Page 223 of 412
When data is written to TDR, the
When data is read from RDR, the
When data is written to TDR, the
REJ09B0142-0600