HD64F3664H Renesas Electronics America, HD64F3664H Datasheet - Page 28

IC H8 MCU FLASH 32K 64QFP

HD64F3664H

Manufacturer Part Number
HD64F3664H
Description
IC H8 MCU FLASH 32K 64QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F3664H

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Table 7.4
Table 7.5
Table 7.6
Table 7.7
Section 10 Timer A
Table 10.1
Section 11 Timer V
Table 11.1
Table 11.2
Section 12 Timer W
Table 12.1
Table 12.2
Section 14 Serial Communication Interface 3 (SCI3)
Table 14.1
Table 14.2
Table 14.2
Table 14.2
Table 14.3
Table 14.4
Table 14.5
Table 14.6
Section 15 I
Table 15.1
Table 15.2
Table 15.3
Table 15.4
Table 15.5
Table 15.6
Table 15.7
Section 16 A/D Converter
Table 16.1
Table 16.2
Table 16.3
Section 17 EEPROM
Table 17.1
Table 17.2
Rev. 6.00 Mar. 24, 2006 Page xxvi of xxviii
2
C Bus Interface (IIC)
Reprogram Data Computation Table .................................................................... 106
Additional-Program Data Computation Table ...................................................... 106
Programming Time ............................................................................................... 106
Flash Memory Operating States............................................................................ 111
Pin Configuration.................................................................................................. 140
Pin Configuration.................................................................................................. 147
Clock Signals to Input to TCNTV and Counting Conditions ............................... 149
Timer W Functions ............................................................................................... 160
Pin Configuration.................................................................................................. 162
Pin Configuration.................................................................................................. 198
Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (1) ...... 206
Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (2) ...... 207
Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (3) ...... 208
Maximum Bit Rate for Each Frequency (Asynchronous Mode) .......................... 208
BRR Settings for Various Bit Rates (Clocked Synchronous Mode)..................... 209
SSR Status Flags and Receive Data Handling ...................................................... 215
SCI3 Interrupt Requests........................................................................................ 230
I
Communication Format ........................................................................................ 239
I
Flags and Transfer States...................................................................................... 249
I
Permissible SCL Rise Time (t
I
Pin Configuration.................................................................................................. 277
Analog Input Channels and Corresponding ADDR Registers .............................. 278
A/D Conversion Time (Single Mode)................................................................... 283
Pin Configuration.................................................................................................. 289
Slave Addresses .................................................................................................... 292
2
2
2
2
C Bus Interface Pins........................................................................................... 235
C Transfer Rate .................................................................................................. 241
C Bus Timing (SCL and SDA Output) .............................................................. 266
C Bus Timing (with Maximum Influence of t
sr
) Values ............................................................... 267
sr
/t
sf
) ............................................ 268

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