HD64F3664H Renesas Electronics America, HD64F3664H Datasheet - Page 325

• Manufacturer Part Number: HD64F3664H
• Description: IC H8 MCU FLASH 32K 64QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3664H

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SCI
• Peripherals: PWM, WDT
• Number Of I /o: 29
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

17.4.9
There are three read operations; current address read, random address read, and sequential read.
Read operations are initiated in the same way as write operations with the exception of R/W = 1.
1. Current Address Read
The internal address counter maintains the (n+1) address that is made by the last address (n)
accessed during the last read or write operation, with incremented by one. Current address
read accesses the (n+1) address kept by the internal address counter.
After receiving in the order of a start condition and the slave address + R/W code (R/W = 1),
the EEPROM outputs the 1-byte data of the (n+1) address from the most significant bit
following acknowledgement "0". If the EEPROM receives in the order of acknowledgement
"1" and a following stop condition, the EEPROM stops the read operation and is turned to a
standby state.
In case the EEPROM has accessed the last address H'01FF at previous read operation, the
current address will roll over and returns to zero address. In case the EEPROM has accessed
the last address of the page at previous write operation, the current address will roll over within
page addressing and returns to the first address in the same page.
The current address is valid while power is on. The current address after power on will be
undefined. After power is turned on, define the address by the random address read operation
described below is necessary.
The current address read operation is shown in figure 17.5.
Read Operation
SCL
SDA
[Legend]
R/W: R/W code (0 is for a write and 1 is for a read)
ACK: acknowledge
condition
Start
Figure 17.5 Current Address Read Operation
1
2
3
Slave address
4
5
6
7
R/W ACK
8
9
Rev. 6.00 Mar. 24, 2006 Page 295 of 412
1
D7
Read Data
D0
8
ACK
9
Section 17 EEPROM
conditon
Stop
REJ09B0142-0600