HD64F3664H Renesas Electronics America, HD64F3664H Datasheet - Page 256

IC H8 MCU FLASH 32K 64QFP

HD64F3664H

Manufacturer Part Number
HD64F3664H
Description
IC H8 MCU FLASH 32K 64QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F3664H

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 14 Serial Communication Interface 3 (SCI3)
14.6.1
Figure 14.16 shows a sample flowchart for multiprocessor serial data transmission. For an ID
transmission cycle, set the MPBT bit in SSR to 1 before transmission. For a data transmission
cycle, clear the MPBT bit in SSR to 0 before transmission. All other SCI3 operations are the same
as those in asynchronous mode.
Rev. 6.00 Mar. 24, 2006 Page 226 of 412
REJ09B0142-0600
Multiprocessor Serial Data Transmission
[1]
[2]
[3]
Figure 14.16 Sample Multiprocessor Serial Transmission Flowchart
Clear PDR to 0 and set PCR to 1
Write transmit data to TDR
Clear TE bit in SCR3 to 0
Read TDRE flag in SSR
Read TEND flag in SSR
Set MPBT bit in SSR
All data transmitted?
Start transmission
Break output?
TDRE = 1
TEND = 1
<End>
Yes
Yes
Yes
No
Yes
No
No
No
[1] Read SSR and check that the TDRE
[2] To continue serial transmission, be
[3] To output a break in serial
flag is set to 1, set the MPBT bit in
SSR to 0 or 1, then write transmit
data to TDR. When data is written to
TDR, the TDRE flag is automatically
cleared to 0.
sure to read 1 from the TDRE flag to
confirm that writing is possible, then
write data to TDR. When data is
written to TDR, the TDRE flag is
automatically cleared to 0.
transmission, set the port PCR to 1,
clear PDR to 0, then clear the TE bit
in SCR3 to 0.

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