HD64F3664H Renesas Electronics America, HD64F3664H Datasheet - Page 279

IC H8 MCU FLASH 32K 64QFP

HD64F3664H

Manufacturer Part Number
HD64F3664H
Description
IC H8 MCU FLASH 32K 64QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F3664H

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Table 15.4 Flags and Transfer States
15.4
The I
15.4.1
The I
in figures 15.3. Figure 15.5 shows the I
always consists of 8 bits.
MST
1/0
1
1
1
1
0
0
0
0
0
0
0
0
2
2
C bus interface has serial and I
C bus formats are addressing formats and an acknowledge bit is inserted. These are shown
TRS
1/0
1
1
1/0
1/0
0
0
0
0
1/0
1/0
1
1/0
Operation
I
2
C Bus Data Format
BBSY ESTP
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1/0
STOP IRTR
0
0
0
0
0
0
0
0
0
0
0
0
1/0
0
0
1
0
1
0
0
0
0
0
1
0
0
2
C bus formats.
2
AASX AL
0
0
0
0
0
1/0
0
0
1
0
1
1
0
C bus timing. The first frame following a start condition
0
0
0
0
0
1
0
0
0
0
0
0
0
AAS
0
0
0
0
0
1/0
1
1
0
0
0
0
0
ADZ
0
0
0
0
0
1/0
0
1
0
0
0
0
0
Rev. 6.00 Mar. 24, 2006 Page 249 of 412
ACKB State
0
0
0
0/1
0/1
0
0
0
0
0/1
0
1
0/1
Section 15 I
Idle state (flag clearing required)
Start condition issuance
Start condition established
Master mode wait
Master mode transmit/receive end
Arbitration lost
SAR match by first frame in slave
mode
General call address match
SARX match
Slave mode transmit/receive end
(except after SARX match)
Slave mode transmit/receive end
(after SARX match)
Stop condition detected
2
C Bus Interface (IIC)
REJ09B0142-0600

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