MRF49XA-I/ST Microchip Technology, MRF49XA-I/ST Datasheet - Page 22

• Manufacturer Part Number: MRF49XA-I/ST
• Description: IC RF TXRX 433/868/915 16-TSSOP
• Manufacturer: Microchip Technology

Specifications of MRF49XA-I/ST

• Package / Case: 16-TSSOP
• Frequency: 433MHz, 868MHz, 915MHz
• Data Rate - Maximum: 256kbps
• Modulation Or Protocol: FHSS, FSK
• Applications: Home / Industrial Automation, Remote Access, Security Alarms
• Power - Output: 7dbm
• Sensitivity: -110dBm
• Voltage - Supply: 2.2 V ~ 3.8 V
• Current - Receiving: 11mA
• Current - Transmitting: 15mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 1
• Number Of Transmitters: 2
• Wireless Frequency: 433 MHz to 915 MHz
• Output Power: + 7 dBm
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Modulation: FHSS, FSK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 579-MRF49XA-1/ST

REGISTER 2-2:
DS70590B-page 20
MRF49XA
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5-4
bit 3-0
Note 1:
TXDEN
R/W-1
R/W-0
2:
If the internal TX data register is used, the DATA/FSK/FSEL pin must be pulled “high”.
If the data FIFO is used, the DATA/FSK/FSEL pin must be pulled “low”.
CCB<15:8>: Command Code bits
The command code bits (10000000b) are serially sent to the microcontroller to identify the bits to be
written in the GENCREG.
TXDEN: TX Data Register Enable bit
1 = Internal TX Data register enabled
0 = Internal TX Data register disabled; no transmit
FIFOEN: FIFO Enable bit
1 = Internal data FIFO enabled; the FIFO is used to store data during receive
0 = FIFO disabled; FSK/DATA/FSEL and RCLKOUT/FCAP/FINT are used to receive data
FBS<1:0>: Frequency Band Select bits
These bits set the frequency band to be used in Sub-GHz range.
11 = 915 MHz
10 = 868 MHz
01 = 433 MHz
00 = Reserved
LCS<3:0>: Load Capacitance Select bits
These bits set and vary the internal load capacitance for the crystal reference.
1111 = 16.0 pF
1110 = 15.5 pF
1101 = 15.0 pF
1100 = 14.5 pF
1011 = 14.0 pF
1010 = 13.5 pF
1001 = 13.0 pF
1000 = 12.5 pF
0111 = 12.0 pF
0110 = 11.5 pF
0101 = 11.0 pF
0100 = 10.5 pF
0011 = 10.0 pF
0010 = 9.5 pF
0001 = 9.0 pF
0000 = 8.5 pF
FIFOEN
R/W-0
R/W-0
GENCREG: GENERAL CONFIGURATION REGISTER (POR: 0x8008)
r = reserved bit
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
FBS<1:0>
R/W-0
R/W-0
Preliminary
CCB<15:8>
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-1
R/W-0
R/W-0
LCS<3:0>
© 2009 Microchip Technology Inc.
x = Bit is unknown
R/W-0
R/W-0
(2)
R/W-0
R/W-0
bit 8
bit 0