5M1270ZT144C4N Altera, 5M1270ZT144C4N Datasheet - Page 107

• Manufacturer Part Number: 5M1270ZT144C4N
• Description: ALTERA
• Manufacturer: Altera
• Series: MAX® Vr

Specifications of 5M1270ZT144C4N

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 6.2ns
• Voltage Supply - Internal: 1.71 V ~ 1.89 V
• Number Of Logic Elements/blocks: 1270
• Number Of Macrocells: 980
• Number Of Gates: -
• Number Of I /o: 114
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Vendor undefined / RoHS Compliant

Chapter 7: User Flash Memory in MAX V Devices
UFM Functional Description
Figure 7–2. Selection of the UFM Sector Using the MSB of the Address Register
January 2011 Altera Corporation
ARDin
UFM Address Register
LSB
A0
A1
The MAX V UFM block is organized as a 512 × 16 memory. Because the UFM block is
organized into two sectors, the MSB of the address indicates the sector that is used; 0
is for sector 0 (UFM0) while 1 is for sector 1 (UFM1). An ERASE instruction erases the
content of the specific sector that is indicated by the MSB of the address register.
Figure 7–2
register.
For more information about the erase mode, refer to
Three control signals exist for the address register: ARSHFT, ARCLK, and ARDin. ARSHFT is
used as both a shift-enable control signal and an auto-increment signal. If the ARSHFT
signal is high, a rising edge on ARCLK loads address data serially from the ARDin port
and moves data serially through the register. A clock edge with the ARSHFT signal low
increments the address register by 1. This implements an auto-increment of the
address to allow data streaming. When a program, read, or erase sequence is
executing, the address that is in the address register becomes the active UFM location.
A2
A3
shows the selection of the UFM sector using the MSB of the address
Address Register
A4
A5
A6
A7
MSB
A8
ARClk
“Erase” on page
0
1
MAX V Device Handbook
7–11.
UFM Block
UFM Block
Sector 0
Sector 1
7–5