5M1270ZT144C4N Altera, 5M1270ZT144C4N Datasheet - Page 122

• Manufacturer Part Number: 5M1270ZT144C4N
• Description: ALTERA
• Manufacturer: Altera
• Series: MAX® Vr

Specifications of 5M1270ZT144C4N

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 6.2ns
• Voltage Supply - Internal: 1.71 V ~ 1.89 V
• Number Of Logic Elements/blocks: 1270
• Number Of Macrocells: 980
• Number Of Gates: -
• Number Of I /o: 114
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Vendor undefined / RoHS Compliant

7–20
MAX V Device Handbook
No Erase
The no erase operation never erases the UFM contents. This method is recommended
when UFM does not require constant re-writing after its initial write of data. For
example, if the UFM data is to be initialized with data during manufacturing using
I
erase option and save LE resources from being used to create erase logic.
Read Operation
The read operation is initiated in the same manner as the write operation except that
the R/W bit must be set to 1. Three different read operations are supported:
■
■
■
After each UFM data has been read and transferred to the master, the UFM address
register is incremented for all single and multi-byte read operations.
Current Address Read
This read operation targets the current byte location pointed to by the UFM address
register.
Figure 7–15. Current Address Read Sequence
2
C, you may not require writing to the UFM again. In that case, you should use the no
Current Address Read (Single Byte)
Random Address Read (Single byte)
Sequential Read (Multi-Byte)
Figure 7–15
S – Start Condition
P – Stop Condition
A – Acknowledge
S
shows the current address read sequence.
Slave Address
‘1’ (read)
R/W
A
Chapter 7: User Flash Memory in MAX V Devices
Data
From Master to Slave
From Slave to Master
January 2011 Altera Corporation
Software Support for UFM Block
P