5M1270ZT144C4N Altera, 5M1270ZT144C4N Datasheet - Page 142

• Manufacturer Part Number: 5M1270ZT144C4N
• Description: ALTERA
• Manufacturer: Altera
• Series: MAX® Vr

Specifications of 5M1270ZT144C4N

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 6.2ns
• Voltage Supply - Internal: 1.71 V ~ 1.89 V
• Number Of Logic Elements/blocks: 1270
• Number Of Macrocells: 980
• Number Of Gates: -
• Number Of I /o: 114
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Vendor undefined / RoHS Compliant

7–40
Figure 7–37. Memory Map for 1-Kbit Memory Initialization
MAX V Device Handbook
1-Kbit ALTUFM_I2C Megafunction
Upper Half – Addresses
Lower Half – Addresses
Logical Memory Contents
40h to 7Fh
00h to 3Fh
Memory Initialization for the ALTUFM_I2C Megafunction
The MAX V UFM physical memory block contains a 16-bit wide and 512 deep (9-bit
address) array. The ALTUFM_I2C megafunction uses the following smaller array
sizes:
■
■
■
■
Altera recommends that you pad the .mif or .hex file for both address and data width
to fill the physical memory map for the UFM block and ensure the .mif or .hex file
represents a full 16-bit word size and a 9-bit address space.
Memory Map for 1-Kbit Memory Initialization
Figure 7–37
of 1-Kbit memory size. The ALTUFM_I2C megafunction byte address location of 00h
to 3Fh is mapped to the UFM block address location of 000h to 03Fh. The
ALTUFM_I2C megafunction byte address location of 40h to 7Fh is mapped to the
UFM block address location of 1C0h to 1FFh. Altera recommends that you pad the
unused address locations of the UFM block with all 1s.
An 8-bit wide and 128 deep (7-bit address) mapping for 1 Kbit memory size
An 8-bit wide and 256 deep (8-bit address) mapping for 2 Kbits memory size
An 8-bit wide and 512 deep (9-bit address) mapping for 4 Kbits memory size
An 8-bit wide and 1,024 deep (10-bit address) mapping for 8 Kbits memory size
7Fh
shows the memory map initialization for the ALTUFM_I2C megafunction
40h
00h
3Fh
1FFh
1C0h
1BFh
03Fh
040h
000h
the actual data and address size for the UFM block
memory maps to 1FFh in the MIF/HEX file, and all
logical memory maps to 03Fh in the MIF/HEX file,
address 000h in the MIF/HEX file. Address 3Fh in
1C0h in the MIF/HEX file. Address 7Fh in logical
MIF or HEX File Contents – to represent
and all data in between follows the order in the
the MIF/HEX file contents should be set to
Address 40h in logical memory maps to
Address 00h in logical memory maps to
data in between follows the order in the
This section of the UFM is unused –
all '1' for addresses 040h to 1BFh
Chapter 7: User Flash Memory in MAX V Devices
logical memory
logical memory
January 2011 Altera Corporation
Creating Memory Content File