5M1270ZT144C4N Altera, 5M1270ZT144C4N Datasheet - Page 89

• Manufacturer Part Number: 5M1270ZT144C4N
• Description: ALTERA
• Manufacturer: Altera
• Series: MAX® Vr

Specifications of 5M1270ZT144C4N

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 6.2ns
• Voltage Supply - Internal: 1.71 V ~ 1.89 V
• Number Of Logic Elements/blocks: 1270
• Number Of Macrocells: 980
• Number Of Gates: -
• Number Of I /o: 114
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Vendor undefined / RoHS Compliant

Chapter 5: Using MAX V Devices in Multi-Voltage Systems
MultiVolt I/O Operation
MultiVolt I/O Operation
5.0-V Device Compatibility
December 2010 Altera Corporation
MAX V devices allow the device core and I/O blocks to be powered-up with separate
supply voltages. The VCCINT pins supply power to the device core and the VCCIO pins
supply power to the device I/O buffers. The VCCINT pins are powered-up with 1.8 V
for MAX V devices. All the VCCIO pins for a given I/O bank that have MultiVolt
capability must be supplied from the same voltage level (for example, 5.0, 3.3, 2.5, 1.8,
1.5, or 1.2 V).
MAX V devices.
Figure 5–2. Implementing a Multi-Voltage System with a MAX V Device
A MAX V device can drive a 5.0-V TTL device by connecting the VCCIO pins of the
MAX V device to 3.3 V. This is possible because the output high voltage (V
3.3-V interface meets the minimum high-level voltage of 2.4 V of a 5.0-V TTL device.
A MAX V device may not correctly interoperate with a 5.0-V CMOS device if the
output of the MAX V device is connected directly to the input of the 5.0-V CMOS
device. If the MAX V device‘s V
still conducts if the pin is driving high, preventing an external pull-up resistor from
pulling the signal to 5.0 V. To make MAX V device outputs compatible with 5.0-V
CMOS devices, configure the output pins as open-drain pins with the I/O clamp
diode enabled and use an external pull-up resistor.
Notes to
(1) MAX V devices can drive a 5.0-V transistor-to-transistor logic (TTL) input when V
(2) MAX V devices can be 5.0-V tolerant with the use of an external resistor and the internal I/O clamp diode on
CMOS, you must have an open-drain setting with an internal I/O clamp diode and external resistor.
5M1270Z and 5M2210Z devices.
Figure
5–2:
Figure 5–2
Device
5.0-V
shows how to implement a multiple-voltage system for
V
CCIO
OUT
is greater than V
Power Supply
MAX V
Device
1.8-V
V
CCINT
CCIO
V
, the PMOS pull-up transistor
CCIO
CCIO
3.3-, 2.5-, 1.8-,
(Note
1.5-, 1.2-V
= 3.3 V. To drive a 5.0-V
Device
MAX V Device Handbook
1),
(2)
OH
) of a
5–3