DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 249

• Manufacturer Part Number: DS33R41
• Description: Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
• Manufacturer: Maxim Integrated Products

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 6: Automatic Gain Control Enable (AGCE)
Bits 5 to 0: Gain Control Bits (GC5 to GC0). The GC0 through GC5 bits control the gain setting automatic gain
control is disabled. Use the tables below for setting the recommended values. The LB (line build-out) column refers
to the value in the L0–L2 bits in TR.LIC1 (Line Interface Control 1) register.
T1, Impedance Match Off
E1, Impedance Match Off
E1, Impedance Match On
T1, Impedance Match On
NETWORK MODE
0 = use Transmit AGC, TR.TLBC bits 0–5 are “don’t care”
1 = do not use Transmit AGC, TR.TLBC bits 0–5 set nominal level
—
7
0
TR.TLBC
Transmit Line Build-Out Control
7Dh
AGCE
6
0
LB
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
4
5
0
1
GC5
GC5
5
0
1
0
0
1
1
1
0
1
0
0
0
0
1
1
0
1
1
1
1
1
0
0
GC4
0
1
1
0
0
0
1
1
1
1
1
1
0
0
0
1
0
0
0
0
1
1
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GC4
4
0
GC3
0
1
1
0
0
0
0
1
1
0
0
1
0
0
1
1
0
0
1
1
1
1
GC2
GC3
1
0
0
0
1
1
0
1
1
1
1
0
0
0
1
1
0
0
0
0
0
0
3
0
GC1
1
1
1
0
1
1
1
1
1
0
0
1
1
0
0
1
0
0
1
0
1
1
GC2
GC0
2
0
0
1
0
0
1
1
1
1
0
1
1
0
0
0
0
1
1
1
0
0
0
0
GC1
1
0
GC0
0
0