DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 51

• Manufacturer Part Number: DS33R41
• Description: Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
• Manufacturer: Maxim Integrated Products

9.11 Flow Control
Flow control may be required to ensure that data queues do not overflow and packets are not lost. The device
allows for optional flow control based on the queue high watermark or through host processor intervention. There
are 2 basic mechanisms that are used for flow control:
Note that the terms “transmit queue” and “receive queue” are with respect to the Ethernet Interface. The Receive
Queue is the queue for the data that arrives on the MII/RMII interface, is processed by the MAC and stored in the
SDRAM. Transmit queue is for data that arrives from the Serial port, is processed by the HDLC and stored in the
SDRAM to be sent to the MAC transmitter.
The following flow control options are possible:
Note that in order to use flow control, the receive queue size (in AR.RQSC1) must be 02h or greater. The receive
queue high threshold (in SU.RQHT) must be set to 01h or greater, but must be less than the queue size. If the high
threshold is set to the same value as the queue size, automatic flow control will not be effective. The high threshold
must always be set to less than the corresponding queue size.
The following table provides all of the flow control options for the device.
Table 9-6. Options for Flow Control
9.11.1 Full Duplex Flow Control
Automatic flow control is enabled by default. The host processor can disable this functionality with
SU.GCR.ATFLOW. The flow control mechanism is governed by the high watermarks (SU.RQHT). The
low threshold can be used as indication that the network congestion is clearing up. The value of SU.RQLT does
not affect the flow control. When the connection queue high threshold is exceeded the device will send a pause
frame with the timer value programmed by the user. See
slots (80 by 64 bytes or 5120 bytes) be used as the standard timer value.
The pause frame causes the distant transmitter to “pause for a time” before starting transmission again. The pause
command has a multicast address 01-80-62-00-00-01. The high and low thresholds for the receive queue are
Configuration
ATFLOW Bit
JAME Bit
FCB Bit
(Pause)
FCE Bit
Pause Timer
•
•
•
•
OPTION
In half duplex mode, a jam sequence is sent that causes collisions at the far end. The collisions cause the
transmitting node to reduce the rate of transmission.
In full duplex mode, flow control is initiated by the receiving node sending a pause frame. The pause frame
has a timer parameter that determines the pause timeout to be used by the transmitting node.
Automatic flow control can be enabled in software mode with the SU.GCR.ATFLOW bit. Note that the user
does not have control over SU.MACFCR.FCE and FCB bits if ATFLOW is set. The mechanism of sending
pause or jam is dependent only on the receive queue high threshold.
Manual flow control can be performed through software when SU.GCR.ATFLOW=0. The host processor
must monitor the receive queues and generate pause frames (full duplex) and/or jam bytes through the
SU.MACFCR.FCB, SU.GCR.JAME, and SU.MACFCR FCE bits.
Controlled By User
Controlled by User
Manual Flow
Half Duplex;
Control
N/A
NA
0
Automatic Flow
Automatically
Automatically
Half Duplex;
Controlled
Controlled
Control
N/A
NA
1
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Table 9-8
MODE
Programmed by User
for more information. It is recommended that 80
Full Duplex; Manual
Controlled by User
Controlled by User
Flow Control
N/A
0
Programmed by User
Automatic Flow
Automatically
Automatically
Full Duplex;
Controlled
Controlled
Control
N/A
1
SU.RQLT