DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 57

• Manufacturer Part Number: DS33R41
• Description: Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
• Manufacturer: Maxim Integrated Products

Figure 9-9. DS33R41 Configured as a DCE in MII Mode
9.13 Ethernet MAC
Indirect addressing is required to access the MAC register settings. Writing to the MAC registers requires the
SU.MACWD0-SU.MACRD3
SU.MACAWL
to SU.MACRWC.MCS (MAC command status). MCS is cleared by the device when the operation is complete.
Reading from the MAC registers requires the
address for the read operation. A read command is issued by writing a one to SU.MACRWC.MCRW and a zero to
SU.MACRWC.MCS. SU.MACRWC.MCS is cleared by the device when the operation is complete. After MCS is
clear, valid data is available in SU.MACRD0-SU.MACRD3. Note that only one operation can be initiated (read or
write) at one time. Data cannot be written or read from the MAC registers until the MCS bit has been cleared by the
device. The MAC Registers are detailed in the following table.
and SU.MACAWH. A write command is issued by writing a zero to SU.MACRWC.MCRW and a one
registers to be written with 4 bytes of data. The address must be written to
MAC
SU.MACRADH
DS33R41
DCE
Tx
Rx
57 of 335
RXD[3:0]
TXD[3:0]
COL_DET
TX_CLK
RX_CRS
RX_ERR
RX_CLK
TX_EN
RXDV
MDIO
MDC
and
SU.MACRADL
MDIO
TX_EN
COL_DET
TX_ERR
RX_CRS
RXD[3:0]
MDC
RX_CLK
TX_CLK
RXDV
TXD[3:0]
DTE
registers to be written with the
Tx
Rx
MAC