LU82551QM Intel, LU82551QM Datasheet - Page 2

• Manufacturer Part Number: LU82551QM
• Manufacturer: Intel

Specifications of LU82551QM

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Lead Free Status / RoHS Status: Compliant

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Revision History
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characterized errata are available on request.
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Revision
Sept 2007
Nov 2008
Dec 2001
Mar 2003
Mar 2004
Nov 2004
July 2007
Mar 2008
Oct 2001
Apr 2002
Jun 2003
Oct 2003
Oct 2004
Jan 2005
Apr 2006
Oct 2006
Date
Revision
3.11
0.6
1.0
2.0
2.1
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
• Removed references to IPSec support and changed description of FLA1/AUXPWR to use a
• Changed description of VCCR to show connecting it directly to main 3.3V supply and reduced
• Reduced PHY functional description to overview level and reorganized manageability section,
• Added description for No Connect pins and corrected typographical errors.
Changed document status to Intel Confidential.
• Removed document status and removed references to MDI/MDI-X feature, which is not sup-
• Added information for the 82551IT.
• Corrected operating temperature range in specifications to 0° to 70° C.
• Added operating temperature reference to Section 1.1
• Removed operating temperature reference to Section 1.1.
• Added references to MDI/MDI-X feature, which is now supported by the 82551QM and
• Updated the section describing “Multiple Priority Transmit Queues”.
• Added information about migrating from a 2-layer 0.36 mm wide-trace substrate to a 2-layer
• Added statement that no changes to existing soldering processes are needed for the 2-layer
• Added a note for PHY signals RBIAS100 and RBIAS10 to Table 9.
• Changed case temperature specification to “0° C to 85° C”.
• Added Figure 31 “196 PBGA Package Pad Detail”. The figure shows solder resist opening and
• Added Section 15 “Reference Schematics”, updated Section 12.1 (changed Tcase to ambient)
• Updated Figures 34 and 35. Added Digital I/O and Crystal Input One (X1) Characteristics
• Updated Figure 35: changed TEST pull down resistor value (62 K to 1 K).
• Updated Table 9 (X1 and X2 pin descriptions).
•
pull-up resistor if auxiliary power is present, else leave it disconnected.
text describing bus operations.
adding ASF text. Added 0Fh as Revision ID and added targeted Icc specs.
ported by the 82551QM
removed information for the 82551IT.
0.32 mm wide-trace substrate. Refer to the section on Package and Pinout Information.
0.32 mm wide-trace substrate change in the section describing “Package Information”.
metal diameter dimensions.
and added ordering information to Section 1.4.
(Tables 70 and 71). Updated Section 5.8.4.
Updated Tables 70 and 71 (Digital I/O and crystal input one (X1) characteristics).
Description
Datasheet