LU82551QM Intel, LU82551QM Datasheet - Page 80

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LU82551QM

Manufacturer Part Number
LU82551QM
Description
Manufacturer
Intel
Datasheet

Specifications of LU82551QM

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Lead Free Status / RoHS Status
Compliant

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82551QM — Networking Silicon
74
Table 37. Statistical Counters
ID
12
16
20
24
28
32
36
40
44
48
52
56
60
Transmit Underrun Errors
Transmit Lost Carrier Sense (CRS)
Transmit Deferred
Transmit Single Collisions
Transmit Multiple Collisions
Transmit Total Collisions
Receive Good Frames
Receive CRC Errors
Receive Alignment Errors
Receive Resource Errors
Receive Overrun Errors
Receive Collision Detect (CDT)
Receive Short Frame Errors
Counter
A transmit underrun occurs because the system bus cannot
keep up with the transmission. This counter contains the
number of frames that were either not transmitted or
retransmitted due to a transmit DMA underrun. If the
82551QM is configured to retransmit on underrun, this counter
may be updated multiple times for a single frame.
This counter contains the number of frames that were
transmitted by the 82551QM despite the fact that it detected
the de-assertion of CRS during the transmission.
This counter contains the number of frames that were
deferred before transmission due to activity on the link.
This counter contains the number of transmitted frames that
encountered one collision.
This counter contains the number of transmitted frames that
encountered more than one collision.
This counter contains the total number of collisions that were
encountered while attempting to transmit. This count includes
late collisions and frames that encountered MAXCOL.
This counter contains the number of frames that were
received properly from the link. It is updated only after the
actual reception from the link is completed and all the data
bytes are stored in memory.
This counter contains the number of aligned frames discarded
because of a CRC error. This counter is updated, if needed,
regardless of the Receive Unit state. The Receive CRC Errors
counter is mutually exclusive of the Receive Alignment Errors
and Receive Short Frame Errors counters.
This counter contains the number of frames that are both
misaligned (for example, CRS de-asserts on a non-octal
boundary) and contain a CRC error. The counter is updated, if
needed, regardless of the Receive Unit state. The Receive
Alignment Errors counter is mutually exclusive of the Receive
CRC Errors and Receive Short Frame Errors counters.
This counter contains the number of good frames discarded
due to unavailability of resources. Frames intended for a host
whose Receive Unit is in the No Resources state fall into this
category. If the 81551QM is configured to Save Bad Frames
and the status of the received frame indicates that it is a bad
frame, the Receive Resource Errors counter is not updated.
This counter contains the number of frames known to be lost
because the local system bus was not available. If the traffic
problem persists for more than one frame, the frames that
follow the first are also lost; however, because there is no lost
frame indicator, they are not counted.
This counter contains the number of frames that encountered
collisions during frame reception.
This counter contains the number of received frames that are
shorter than the minimum frame length. The Receive Short
Frame Errors counter is mutually exclusive to the Receive
Alignment Errors and Receive CRC Errors counters. A short
frame will always increment only the Receive Short Frame
Errors counter.
Description
Datasheet

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