LU82551QM Intel, LU82551QM Datasheet - Page 38

• Manufacturer Part Number: LU82551QM
• Manufacturer: Intel

Specifications of LU82551QM

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Lead Free Status / RoHS Status: Compliant

82551QM — Networking Silicon
5.6
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When the 82551QM is in WOL mode:
The 82551QM switches from WOL mode to the D0a power state following a setup of the Memory
or I/O Base Address Registers in the PCI Configuration space. If the 82551QM receives a Magic
Packet while the it is in the D0u, D1, D2, or D3 power state, it issues a positive pulse on the
CSTSCHG pin. This pulse is cleared by a later non-Wake on LAN message. For PCI systems and
in designs that support the 3-pin header standard, the CSTSCHG pin acts as the WOL signal.
Parallel Flash/Modem Interface
The 82551QM’s parallel interface is used for Flash interface only or modem interface only. The
82551QM supports a glueless interface to an 8-bit wide, 128 KB, parallel memory device. The
parallel local port is multiplexed with a modem interface in a LAN/modem combination card.
The Flash (or boot PROM) is read from or written to whenever the host CPU performs a read or a
write operation to a memory location that is within the Flash mapping window. All accesses to the
Flash, except read accesses, require the appropriate command sequence for the device used. (Refer
to the specific Flash data sheet for more details on reading from or writing to the Flash device.) The
accesses to the Flash are based on a direct decode of CPU accesses to a memory window defined in
either the 82551QM Flash Base Address Register (PCI Configuration space at offset 18h) or the
Expansion ROM Base Address Register (PCI Configuration space at offset 30h). The 82551QM
asserts control to the Flash when it decodes a valid access.
The 82551QM supports an external Flash memory (or boot PROM) of up to 128 KB. The
Expansion ROM address can be separately disabled by setting the corresponding bit in the
EEPROM, word Ah.
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An ALTRST# is completed.
The 82551QM reads the EEPROM and the WOL bit is set.
The 82551QM scans incoming packets for a Magic Packet. When it receives a Magic Packet,
the 82551QM asserts the PME# signal (until cleared) and the CSTSCHG signal for 52 ms.
The Activity LED changes its functionality to indicate that the received frame passed
Individual Address (IA) filtering or broadcast filtering.
The PCI Configuration registers are accessible to the host.
Software must not attempt to access the Flash.
Datasheet