LU82551QM Intel, LU82551QM Datasheet - Page 65

• Manufacturer Part Number: LU82551QM
• Manufacturer: Intel

Specifications of LU82551QM

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Lead Free Status / RoHS Status: Compliant

9.1.21
Datasheet
Table 20. Power Management Capability Register
Table 21. Power Management Control and Status Register
Power Management Control/Status Register (PMCSR)
The Power Management Control/Status is a word register. It is used to determine and change the
current power state of the 82551QM and control the power management interrupts in a standard
manner.
20
19
18:16
15
14:13
12:9
8
7:5
4
3:2
1:0
Bits
Bits
0b (PCI)
1b
(CardBus)
0b
010b
0b
00b
0000b
0b
000b
0b
00b
00b
Default
Default
Read Only
Read Only
Read Only
Read/Clear
Read Only
Read Only
Read Clear
Read Only
Read Only
Read Only
Read/Write
Read/Write
Read/Write
Reserved (PCI)/Auxiliary Power Source (CardBus). When this bit
is set to 1, it indicates that the 82551QM requires auxiliary power
supplied by the system for wake-up from the D3
PME Clock. The 82551QM does not require a clock to generate a
power management event.
Version. A value of 010b indicates that the 82551QM complies with
of the PCI Power Management Specification, Revision 2.2.
PME Status. This bit is set upon a wake-up event. It is independent of
the state of the PME Enable bit. If 1b is written to this bit, the bit will be
cleared. It also de-asserts the PME# signal and clears the PME status
bit in the Power Management Driver Register. When the PME# signal
is enabled, the PME# signal reflects the state of the PME status bit.
In a CardBus system, writing a 1b to this bit clears the GWAKE bit in
the Function Event register.
Data Scale. This field indicates the data register scaling factor. It
equals 10b for registers zero through eight and 00b for registers nine
through fifteen.
Data Select. This field is used to select which data is reported through
the Data register and Data Scale field.
PME Enable. This bit enables the 82551QM to assert PME#.
Reserved . These bits are reserved and should be set to 000b.
Dynamic Data. The 82551QM does not support the ability to monitor
the power consumption dynamically.
Reserved. These bits are reserved and should be set to 00b.
Power State. This 2-bit field is used to determine the current power
state of the 82551QM and to set the 82551QM into a new power state.
The definition of the field values is as follows.
00 - D0
01 - D1
10 - D2
11 - D3
Description
Description
Networking Silicon — 82551QM
cold
state.
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