LU82551QM Intel, LU82551QM Datasheet - Page 7

• Manufacturer Part Number: LU82551QM
• Manufacturer: Intel

Specifications of LU82551QM

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Lead Free Status / RoHS Status: Compliant

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Datasheet
Introduction
This datasheet is applicable to the Intel
Controller, a member of the 8255x Fast Ethernet Controller family.
Overview
The 82551QM is an evolutionary addition to Intel’s family of 8255x controllers. It provides
excellent performance by offloading TCP, UDP and IP checksums and supports TCP segmentation
off-load for operations such as Large Send.
Its optimized 32-bit interface and efficient scatter-gather bus mastering capabilities enable the
82551QM to perform high speed data transfers over the PCI bus or CardBus. This capability
accelerates the processing of high level commands and operations, which lowers CPU utilization.
Its architecture enables data to flow efficiently from the bus interface unit to the 3 KB Transmit and
Receive FIFOs, providing the perfect balance between the wire and system bus. In addition,
multiple priority queues are provided to prevent data underruns and overruns.
The 82551QM also integrates advanced manageability features into one component. It includes
support for the Alerting Standards Forum (ASF) alert standard format bi-directional alerting and
provides a Total Cost of Ownership (TCO) interface that can be used with bus management
controllers. ASF sensor polling is supported, as well as remote control capabilities. The 82551QM
embeds UNDI (Universal NIC Driver Interface) code, allowing it to support Preboot eXecutable
Environment (PXE) without the use of additional external ROM.
The 82551QM includes both a MAC and PHY. In also has a simple interface to the analog front
end, which allows cost effective designs requiring minimal board real estate. The 82551QM is pin
compatible with the 82550 and 82559 family of controllers and is offered with software that
provides backwards compatibility with previous 8255x controllers.
Byte Ordering
TCP and IP Internet Engineering Task Force (IETF) Request for Comments (RFCs) and literature
use big endian (BE) byte ordering. This document uses big endian ordering for all IP and TCP
frame formats. However, little endian byte ordering is used for referencing 82551QM memory
resident structures and internal structures.
References
The following documents may provide further information on topics discussed in this document.
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10/100 Mbit Ethernet Controller Family Software Developer’s Manual. Intel Corporation.
Advanced Configuration and Power Interface Specification, Revision 1.0. Intel Corporation,
Microsoft Corporation, and Toshiba.
IEEE 802.3x and 802.1y Standards.
®
82551QM Fast Ethernet Multifunction PCI/CardBus
Networking Silicon — 82551QM
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