LU82551QM Intel, LU82551QM Datasheet - Page 73

• Manufacturer Part Number: LU82551QM
• Manufacturer: Intel

Specifications of LU82551QM

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Lead Free Status / RoHS Status: Compliant

10.1.2
10.1.3
10.1.4
10.1.5
Datasheet
Table 27. System Control Block Status Word
Table 28. System Control Block Command Word
System Control Block Command Word
Commands for the 82551QM’s Command and Receive units are placed in this register by the CPU.
System Control Block General Pointer
The System Control Block (SCB) General Pointer is a 32-bit field that points to various data
structures depending on the command in the CU Command or RU Command field.
PORT
The PORT interface allows software to perform certain control functions on the 82551QM. This
field is 32 bits wide:
Flash Control Register
The Flash Control Register is a 32-bit field that allows access to an external Flash device.
8
7:6
5:2
1:0
31:26
25
24
23:20
19:16
•
•
Bits
Bits
Address and Data (bits 32:4)
PORT Function Selection (bits 3:0)
The 82551QM supports four PORT commands: Software Reset, Self-test, Selective Reset, and
Dump.
FCP
CUS
RUS
Reserved
Specific
Interrupt Mask
SI
M
CUC
RUC
Name
Name
Flow Control Pause. The FCP bit is used as the flow control pause bit.
Command Unit Status. The CUS field contains the status of the Command
Unit.
Receive Unit Status. The RUS field contains the status of the Receive Unit.
These bits are reserved and should be set to 0b.
Specific Interrupt Mask. Setting this bit to 1b causes the 82551QM to stop
generating an interrupt (in other words, de-assert the INTA# signal) on the
corresponding event.
Software Generated Interrupt. Setting this bit to 1b causes the 82551QM
to generate an interrupt. Writing a 0b to this bit has no effect.
Interrupt Mask. If the Interrupt Mask bit is set to 1b, the 82551QM will not
assert its INTA# pin. The M bit has higher precedence that the Specific
Interrupt Mask bits and the SI bit.
Command Unit Command. This field contains the CU command.
Receive Unit Command. This field contains the RU command.
Description
Description
Networking Silicon — 82551QM
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