LU82551QM Intel, LU82551QM Datasheet - Page 62

• Manufacturer Part Number: LU82551QM
• Manufacturer: Intel

Specifications of LU82551QM

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Lead Free Status / RoHS Status: Compliant

82551QM — Networking Silicon
9.1.9.4
9.1.10
9.1.11
9.1.12
56
Expansion ROM Base Address Register
The Expansion ROM has a memory space of 1 MB and its BAR is a Dword register that supports a
128 KB memory via the 82551QM local bus. The Expansion ROM BAR can be disabled by setting
the Boot Disable bit located in the EEPROM (word Ah, bit 11). If the Boot Disable bit is set, the
82551QM returns a 0b for all bits in this address register, avoiding request of memory allocation
for this space. In LAN/modem combination designs using a Flash device, this bit controls the state
of the Modem Chip Select (MDMCS#) pin and is cleared after the initial access of the expansion
ROM area. Therefore, in LAN/modem combination designs the MDMCS# pin will be de-asserted
(high) when the Boot Disable bit is not set in the EEPROM and the ROM enable bit is set in the
Expansion ROM Base Address Register. After the initial access to the Expansion ROM BAR, the
Boot Disable bit will be cleared and the MDMCS# signal is asserted (low) enabling the modem to
use the local bus.
Base Address Registry Summary
The preceding description of the Base Address Registers’ functions are listed in the following
table:
CardBus Card Information Structure (CIS) Pointer
The Card Information Structure (CIS) pointer is a Dword hard-coded, read only register. It is
meaningful only in a CardBus system (in a PCI system it is zero). The CIS pointer defines where
the CIS structure is mapped in the Flash address space.
PCI Subsystem Vendor ID and Subsystem ID Registers
The Subsystem Vendor ID field identifies the vendor of an 82551QM based solution. The
Subsystem Vendor ID values are based upon the vendor’s PCI Vendor ID and is controlled by the
PCI Special Interest Group (SIG).
The Subsystem ID field identifies the 82551QM based specific solution implemented by the
vendor indicated in the Subsystem Vendor ID field.
Table 17. Base Address Register Functions
Table 18. CIS Pointer
31:4
3:0
Register Name
Expansion BAR
Bits
BAR0
BAR1
BAR2
R
R
R/W
1000h
3h
Default
PCI Function
Memory CSR
BootROM
I/O CSR
Flash
Ethernet CIS Pointer (above the physical Flash window)
CIS in the Flash window
PCI Window
128 KB
1 MB
4 KB
4 KB
Description
N/A (disabled by
CIS at offset +
Memory CSR
EEPROM)
CardBus
Function
I/O CSR
64 KB
CardBus
Window
Datasheet
128 KB
1 MB
4 KB
4 KB