PIC18F45K22-I/P Microchip Technology Inc., PIC18F45K22-I/P Datasheet - Page 129

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PIC18F45K22-I/P

Manufacturer Part Number
PIC18F45K22-I/P
Description
40 PDIP .600in TUBE, 32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F45K22-I/P

A/d Inputs
28-Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
3-8-bit, 4-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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REGISTER 9-16:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
SSP2IP
R/W-0
SSP2IP: Synchronous Serial Port 2 Interrupt Priority bit
1 = High priority
0 = Low priority
BCL2IP: Bus Collision 2 Interrupt Priority bit
1 = High priority
0 = Low priority
RC2IP: EUSART2 Receive Interrupt Priority bit
1 = High priority
0 = Low priority
TX2IP: EUSART2 Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
CTMUIP: CTMU Interrupt Priority bit
1 = High priority
0 = Low priority
TMR5GIP: TMR5 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
TMR3GIP: TMR3 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
TMR1GIP: TMR1 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
BCL2IP
R/W-0
IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3
W = Writable bit
‘1’ = Bit is set
RC2IP
R/W-0
R/W-0
TX2IP
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CTMUIP
R/W-0
PIC18(L)F2X/4XK22
TMR5GIP
R/W-0
x = Bit is unknown
TMR3GIP
R/W-0
DS41412D-page 129
TMR1GIP
R/W-0
bit 0

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