PIC18F45K22-I/P Microchip Technology Inc., PIC18F45K22-I/P Datasheet - Page 155
PIC18F45K22-I/P
Manufacturer Part Number
PIC18F45K22-I/P
Description
40 PDIP .600in TUBE, 32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F45K22-IP.pdf
(496 pages)
Specifications of PIC18F45K22-I/P
A/d Inputs
28-Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
3-8-bit, 4-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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REGISTER 10-10: LATx: PORTx OUTPUT LATCH REGISTER
REGISTER 10-11: LATE: PORTE OUTPUT LATCH REGISTER
REGISTER 10-12: WPUB: WEAK PULL-UP PORTB REGISTER
2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-3
bit 2-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
R/W-x/u
WPUB7
LATx7
R/W-1
U-0
—
2:
2:
Register Description for LATA, LATB, LATC and LATD.
Writes to PORTA are written to corresponding LATA register. Reads from PORTA register is return of I/O
pin values.
Available on PIC18(L)F4XK22 devices only.
Writes to PORTA are written to corresponding LATA register. Reads from PORTA register is return of I/O
pin values.
LATx<7:0>: PORTx Output Latch bit value
Unimplemented: Read as ‘0’
LATE<2:0>: PORTE Output Latch bit value
WPUB<7:0>: Weak Pull-up Register bits
1 = Pull-up enabled on PORT pin
0 = Pull-up disabled on PORT pin
R/W-x/u
WPUB6
LATx6
R/W-1
U-0
—
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-x/u
WPUB5
LATx5
R/W-1
U-0
—
R/W-x/u
WPUB4
LATx4
R/W-1
U-0
Preliminary
—
(2)
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-x/u
WPUB3
LATx3
R/W-1
U-0
—
PIC18(L)F2X/4XK22
(1)
(1)
R/W-x/u
R/W-x/u
WPUB2
LATE2
LATx2
R/W-1
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
R/W-x/u
R/W-x/u
WPUB1
LATE1
LATx1
R/W-1
DS41412D-page 155
R/W-x/u
R/W-x/u
WPUB0
LATE0
LATx0
R/W-1
bit 0
bit 0
bit 0
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