PIC18F45K22-I/P Microchip Technology Inc., PIC18F45K22-I/P Datasheet - Page 343

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PIC18F45K22-I/P

Manufacturer Part Number
PIC18F45K22-I/P
Description
40 PDIP .600in TUBE, 32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F45K22-I/P

A/d Inputs
28-Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
3-8-bit, 4-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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23.0
The PIC18(L)F2X/4XK22 devices have a High/Low-
Voltage Detect module (HLVD). This is a programmable
circuit that sets both a device voltage trip point and the
direction of change from that point. If the device experi-
ences an excursion past the trip point in that direction, an
interrupt flag is set. If the interrupt is enabled, the pro-
gram execution branches to the interrupt vector address
and the software responds to the interrupt.
REGISTER 23-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
Note 1:
VDIRMAG
R/W-0
HIGH/LOW-VOLTAGE DETECT
(HLVD)
See
Table 27-4
VDIRMAG: Voltage Direction Magnitude Select bit
1 = Event occurs when voltage equals or exceeds trip point (HLVDL<3:0>)
0 = Event occurs when voltage equals or falls below trip point (HLVDL<3:0>)
BGVST: Band Gap Reference Voltages Stable Status Flag bit
1 = Internal band gap voltage references are stable
0 = Internal band gap voltage reference is not stable
IRVST: Internal Reference Voltage Stable Flag bit
1 = Indicates that the voltage detect logic will generate the interrupt flag at the specified voltage range
0 = Indicates that the voltage detect logic will not generate the interrupt flag at the specified voltage
HLVDEN: High/Low-Voltage Detect Power Enable bit
1 = HLVD enabled
0 = HLVD disabled
HLVDL<3:0>: Voltage Detection Level bits
1111 = External analog input is used (input comes from the HLVDIN pin)
1110 = Maximum setting
.
.
.
0000 = Minimum setting
BGVST
range and the HLVD interrupt should not be enabled
R-0
HLVDCON: HIGH/LOW-VOLTAGE DETECT CONTROL REGISTER
for specifications.
W = Writable bit
‘1’ = Bit is set
IRVST
R-0
HLVDEN
R/W-0
Preliminary
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
The
(Register
HLVD module. This allows the circuitry to be “turned
off” by the user under software control, which
minimizes the current consumption for the device.
The module’s block diagram is shown in
PIC18(L)F2X/4XK22
High/Low-Voltage
23-1) completely controls the operation of the
R/W-1
HLVDL<3:0>
x = Bit is unknown
Detect
R/W-0
DS41412D-page 343
Control
Figure
R/W-1
register
23-1.
bit 0

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