mc68hc708mp16 Freescale Semiconductor, Inc, mc68hc708mp16 Datasheet - Page 137

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mc68hc708mp16

Manufacturer Part Number
mc68hc708mp16
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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9.4.2 Prescaler
9.5 PWM Generators
9.5.1 Load Operation
MC68HC708MP16
Freescale Semiconductor
Rev. 3.1
To permit lower PWM frequencies, a prescaler is provided which will
divide the PWM clock frequency by 1, 2, 4, or 8.
setting the prescaler bits in PWM control register 2 affects the PWM
clock frequency. This prescaler is buffered and will not be used by the
PWM generator until the LDOK bit is set and a new PWM reload-cycle
begins.
Pulse width modulator (PWM) generators are discussed in the following
subsections.
To help avoid erroneous pulse widths and PWM periods, the modulus,
prescaler, and PWM value registers are buffered. New PWM values,
counter modulus values, and prescalers can be loaded from their buffers
into the PWM module every one, two, four, or eight PWM cycles.
LDFQ1:LDFQ0 in PWM control register 2 are used to control this reload
frequency, as shown in
regardless of whether an actual reload occurs (as determined by the
LDOK bit), the PWM reload flag bit in PWM control register 1 will be set.
If the PWMINT bit in PWM control register 1 is set, a CPU interrupt
request will be generated when PWMF is set. Software can use this
interrupt to calculate new PWM parameters in real time for the PWM
module.
Pulse Width Modulator for Motor Control (PWMMC)
PRSC1:PRSC0
Prescaler Bits
00
01
10
11
Table 9-1. PWM Prescaler
Table
Pulse Width Modulator for Motor Control (PWMMC)
9-2. When a reload cycle arrives,
PWM Clock Frequency
f
f
f
op
op
op
f
op
/2
/4
/8
Table 9-1
Technical Data
shows how
137

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