mc68hc708mp16 Freescale Semiconductor, Inc, mc68hc708mp16 Datasheet - Page 265

• Manufacturer Part Number: mc68hc708mp16
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

MC68HC708MP16
Freescale Semiconductor
—
Rev. 3.1
OVRF generates a receiver/error CPU interrupt request if the error
interrupt enable bit (ERRIE) is also set. When the DMAS bit is low, the
SPRF, MODF, and OVRF interrupts share the same CPU interrupt
vector. (See
individually to generate a receiver/error CPU interrupt request. However,
leaving MODFEN low prevents MODF from being set.
If the CPU SPRF interrupt is enabled and the OVRF interrupt is not,
watch for an overflow condition.
miss an overflow. The first part of
to read the SPSCR and SPDR to clear the SPRF without problems.
However, as illustrated by the second transmission example, the OVRF
bit can be set in between the time that SPSCR and SPDR are read.
SPSCR
OVRF
READ
READ
SPDR
SPRF
1
2
3
4
BYTE 1
Serial Peripheral Interface Module (SPI)
BYTE 1 SETS SPRF BIT.
CPU READS SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
CPU READS BYTE 1 IN SPDR,
CLEARING SPRF BIT.
BYTE 2 SETS SPRF BIT.
1
Figure 13-9. Missed Read of Overflow Condition
2
Figure
3
13-11.) It is not possible to enable MODF or OVRF
BYTE 2
4
Figure 13-9
Figure 13-9
BYTE 3
5
5
6
7
8
Serial Peripheral Interface Module (SPI)
6
CPU READS SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
BYTE 3 SETS OVRF BIT. BYTE 3 IS LOST.
CPU READS BYTE 2 IN SPDR, CLEARING SPRF BIT,
BUT NOT OVRF BIT.
BYTE 4 FAILS TO SET SPRF BIT BECAUSE
OVRF BIT IS NOT CLEARED. BYTE 4 IS LOST.
7
shows how it is possible to
shows how it is possible
BYTE 4
8
Technical Data
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