mc68hc708mp16 Freescale Semiconductor, Inc, mc68hc708mp16 Datasheet - Page 239

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mc68hc708mp16

Manufacturer Part Number
mc68hc708mp16
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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12.8.2 TIMB Channel I/O Pins (PTE4/TCH0B:PTE7/TCH3B)
12.9 I/O Registers
MC68HC708MP16
Freescale Semiconductor
Rev. 3.1
The minimum TCLK pulse width, TCLK
The maximum TCLK frequency is:
PTE3/TCLKB is available as a general-purpose I/O pin when not used
as the TIMB clock input. When the PTE3/TCLKB pin is the TIMB clock
input, it is an input regardless of the state of the DDRE3 bit in data
direction register E.
Each channel I/O pin is programmable independently as an input
capture pin or an output compare pin. PTE4/TCH0B and PTE6/TCH2B
can be configured as buffered output compare or buffered PWM pins.
The following I/O registers control and monitor operation of the TIMB:
bus frequency ÷ 2
TIMB status and control register (TBSC)
TIMB control registers (TBCNTH:TBCNTL)
TIMB counter modulo registers (TBMODH:TBMODL)
TIMB channel status and control registers (TBSC0, TBSC1,
TBSC2, and TBSC3)
TIMB channel registers (TBCH0H:TBCH0L, TBCH1H:TBCH1L,
TBCH2H:TBCH2L, and TBCH3H:TBCH3L)
Timer Interface Module B (TIMB)
------------------------------------ -
bus frequency
1
LMIN
+
t
SU
Timer Interface Module B (TIMB)
or TCLK
HMIN
, is:
Technical Data
239

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