mc68hc708mp16 Freescale Semiconductor, Inc, mc68hc708mp16 Datasheet - Page 277

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mc68hc708mp16

Manufacturer Part Number
mc68hc708mp16
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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13.14.1 SPI Control Register
MC68HC708MP16
Freescale Semiconductor
Rev. 3.1
Address: $001B
The SPI control register does the following:
SPRIE — SPI Receiver Interrupt Enable Bit
DMAS —DMA Select Bit
SPMSTR — SPI Master Bit
Reset:
Read:
Write:
This read/write bit enables CPU interrupt requests generated by the
SPRF bit. The SPRF bit is set when a byte transfers from the shift
register to the receive data register. Reset clears the SPRIE bit.
This read-only bit has no effect on this version of the SPI. This bit
always reads as a 0.
1 = SPRF CPU interrupt requests
0 = SPRF CPU interrupt requests
0 = SPRF DMA and SPTE DMA service requests disabled
Enables SPI module interrupt requests
Selects CPU interrupt requests
Configures the SPI module as master or slave
Selects serial clock polarity and phase
Configures the SPSCK, MOSI, and MISO pins as open-drain
outputs
Enables the SPI module
Serial Peripheral Interface Module (SPI)
SPRIE
Bit 7
(SPRF CPU and SPTE CPU interrupt requests enabled)
0
Figure 13-13. SPI Control Register (SPCR)
= Unimplemented
DMAS
6
0
SPMSTR
5
1
CPOL
4
0
Serial Peripheral Interface Module (SPI)
CPHA
3
1
SPWOM
2
0
SPE
1
0
Technical Data
SPTIE
Bit 0
0
277

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