mc68hc708mp16 Freescale Semiconductor, Inc, mc68hc708mp16 Datasheet - Page 91

• Manufacturer Part Number: mc68hc708mp16
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

7.4.2.5 Low-Voltage Inhibit (LVI) Reset
7.5 SIM Counter
7.5.1 SIM Counter During Power-On Reset
7.5.2 SIM Counter and Reset States
MC68HC708MP16
Freescale Semiconductor
—
Rev. 3.1
The low-voltage inhibit module (LVI) asserts its output to the SIM when
the V
level for at least nine consecutive CPU cycles. The LVI bit in the SIM
reset status register (SRSR) is set, and the external reset pin (RST) is
held low while the SIM counter counts out 4096 CGMXCLK cycles.
Sixty-four CGMXCLK cycles later, the CPU is released from reset to
allow the reset vector sequence to occur. The SIM actively pulls down
the RST pin for all internal reset sources.
The SIM counter is used by the power-on reset module (POR) to allow
the oscillator time to stabilize before enabling the internal bus (IBUS)
clocks. The SIM counter also serves as a prescaler for the computer
operating properly module (COP). The SIM counter overflow supplies
the clock for the COP module. The SIM counter is 13 bits long and is
clocked by the falling edge of CGMXCLK.
The power-on reset module (POR) detects power applied to the MCU.
At power-on, the POR circuit asserts the signal PORRST. Once the SIM
is initialized, it enables the clock generation module (CGM) to drive the
bus clock state machine.
External reset has no effect on the SIM counter. The SIM counter is free-
running after all reset states. (See
Sources
DD
voltage falls to the LVI
for counter control and internal reset recovery sequences.)
System Integration Module (SIM)
TRIPF
7.4.2 Active Resets from Internal
voltage and remains at or below that
System Integration Module (SIM)
Technical Data
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