AT89LP6440-20AU Atmel, AT89LP6440-20AU Datasheet - Page 117

• Manufacturer Part Number: AT89LP6440-20AU
• Description: MCU 8051 64K FLASH ISP 44TQFP
• Manufacturer: Atmel
• Series: 89LPr

Specifications of AT89LP6440-20AU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Package: 44TQFP
• Device Core: 8051
• Family Name: 89LP
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 38
• Interface Type: 2-Wire/SPI
• On-chip Dac: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 18-11. Format and States in Master Transmitter Mode
18.6.2
3706A–MICRO–9/09
Successfull
transmission
to a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Not acknowledge
received after a data
byte
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
Master Receiver Mode
From master to slave
From slave to master
08h
S
In the Master Receiver mode, a number of data bytes are received from a slave transmitter. In
order to enter a Master mode, a START condition must be transmitted. The format of the follow-
ing address packet determines whether Master Transmitter or Master Receiver mode is to be
entered. If SLA+W is transmitted, MT mode is entered, if SLA+R is transmitted, MR mode is
entered.
SLA
W
MT
A or A
DATA
18h
20h
38h
68h
A
A
A
78h
Other master
Other master
n
continues
continues
P
B0h
DATA
A
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the Two-wire Serial Bus. The
prescaler bits are zero or masked to zero
AT89LP6440 - Preliminary
A or A
28h
30h
38h
To corresponding
states in slave mode
A
A
Other master
10h
continues
P
R
P
S
SLA
W
R
MR
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