AT89LP6440-20AU Atmel, AT89LP6440-20AU Datasheet - Page 37

• Manufacturer Part Number: AT89LP6440-20AU
• Description: MCU 8051 64K FLASH ISP 44TQFP
• Manufacturer: Atmel
• Series: 89LPr

Specifications of AT89LP6440-20AU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Package: 44TQFP
• Device Core: 8051
• Family Name: 89LP
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 38
• Interface Type: 2-Wire/SPI
• On-chip Dac: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.2.2
8.3
8.3.1
3706A–MICRO–9/09
Reducing Power Consumption
Reset Recovery from Power-down
Brown-out Detector
Figure 8-1.
When PWDEX = “1”, the wake-up period is controlled externally by the interrupt. Again, at the
falling edge on the interrupt pin, power-down is exited and the oscillator is restarted. However,
the internal clock will not propagate until the rising edge of the interrupt pin as shown in
2. The interrupt pin should be held low long enough for the selected clock source to stabilize.
After the rising edge on the pin the interrupt service routine will be executed.
Figure 8-2.
The wake-up from Power-down through an external reset is similar to the interrupt with
PWDEX = “0”. At the falling edge of RST, Power-down is exited, the oscillator is restarted, and
an internal timer begins counting as shown in
propagate to the CPU until after the timer has timed out. The time-out period is controlled by the
Start-up Timer Fuses. (See
clock cycle internal reset is generated when the internal clock restarts. Otherwise, the device will
remain in reset until RST is brought high.
Several possibilities need consideration when trying to reduce the power consumption in an
AT89LP-based system. Generally, Idle or Power-down mode should be used as much as possi-
ble. All unneeded functions should be disabled. In particular, the following modules may need
special consideration when trying to achieve the lowest possible power consumption.
If the Brown-out Detector is not needed by the application, this module should be turned off. If
the Brown-out Detector is enabled by the BOD Enable Fuse, it will be enabled in all modes
except Power-down. See
Internal
Internal
XTAL1
XTAL1
Clock
PWD
Clock
INT1
PWD
INT1
Interrupt Recovery from Power-down (PWDEX = 0)
Interrupt Recovery from Power-down (PWDEX = 1)
Section 25.7 “User Configuration Fuses” on page
Table 7-1 on page
Figure
AT89LP6440 - Preliminary
34). If RST returns high before the time-out, a two
t SUT
8-3. The internal clock will not be allowed to
164.
Figure 8-
37