AT89LP6440-20AU Atmel, AT89LP6440-20AU Datasheet - Page 29

• Manufacturer Part Number: AT89LP6440-20AU
• Description: MCU 8051 64K FLASH ISP 44TQFP
• Manufacturer: Atmel
• Series: 89LPr

Specifications of AT89LP6440-20AU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Package: 44TQFP
• Device Core: 8051
• Family Name: 89LP
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 38
• Interface Type: 2-Wire/SPI
• On-chip Dac: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.3
3706A–MICRO–9/09
Instruction Set Extensions
Table 5-8
For more information on the instruction set see
143. For detailed descriptions of the extended instructions see
Extensions” on page
Table 5-8.
• The /DPTR instructions provide support for the dual data pointer features described above
• The ASR M, LSL M, CLR M and MAC AB instructions are part of the Multiply-Accumulate
• The JMP @A+PC instruction supports localized jump tables without using a data pointer.
• The CJNE A, @R
• The BREAK instruction is used by the On-Chip Debug system. See
(See
Unit (See
Opcode
A5 A3
A5 A4
A5 B6
A5 B7
A5 E0
A5 E4
A5 00
A5 03
A5 23
A5 73
A5 90
A5 93
A5 F0
Section
lists the additions to the 8051 instruction set that are supported by the AT89LP6440.
Section
AT89LP6440 Extended Instructions
Mnemonic
BREAK
ASR M
LSL M
JMP @A+PC
MOV /DPTR, #data16
MOVC A, @A+/DPTR
INC /DPTR
MAC AB
CJNE A, @R0, rel
CJNE A, @R1, rel
MOVX A, @/DPTR
CLR M
MOVX @/DPTR, A
5.2).
i
147.
, rel instructions allow compares of array values with non-constant values.
5.1).
Description
Software breakpoint
Arithmetic shift right of M register
Logical shift left of M register
Indirect jump relative to PC
Move 16-bit constant to alternate data
pointer
Move code location to ACC relative to
alternate data pointer
Increment alternate data pointer
Multiply and accumulate
Compare ACC to indirect RAM and
jump if not equal
Compare ACC to indirect RAM and
jump if not equal
Move external to ACC; 16-bit address
in alternate data pointer
Clear M register
Move ACC to external; 16-bit address
in alternate data pointer
AT89LP6440 - Preliminary
Section 22. “Instruction Set Summary” on page
Section 22.1 “Instruction Set
Section 24. on page
Bytes
2
2
2
2
4
2
2
2
3
3
2
2
2
Cycles
3/5
3/5
2
2
2
3
4
4
3
9
4
4
2
155.
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