AT89LP6440-20AU Atmel, AT89LP6440-20AU Datasheet - Page 124

MCU 8051 64K FLASH ISP 44TQFP

AT89LP6440-20AU

Manufacturer Part Number
AT89LP6440-20AU
Description
MCU 8051 64K FLASH ISP 44TQFP
Manufacturer
Atmel
Series
89LPr
Datasheets

Specifications of AT89LP6440-20AU

Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
8K x 8
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Package
44TQFP
Device Core
8051
Family Name
89LP
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
38
Interface Type
2-Wire/SPI
On-chip Dac
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89LP6440-20AU
Manufacturer:
Cirrus
Quantity:
89
Part Number:
AT89LP6440-20AU
Manufacturer:
Atmel
Quantity:
10 000
.
Table 18-9.
124
Status
Code
(TWSR)
A8h
B0h
B8h
C0h
C8h
AT89LP6440 - Preliminary
Status of the Two-wire
Serial Bus and Two-wire
Serial Interface Hardware
Own SLA+R has been
received; ACK has been
returned
Arbitration lost in SLA+R/W
as master; own SLA+R has
been received; ACK has
been returned
Data byte in TWDR has
been transmitted; ACK has
been received
Data byte in TWDR has
been transmitted; NOT ACK
has been received
Last data byte in TWDR has
been transmitted (AA = “0”);
ACK has been received
Status Codes for Slave Transmitter Mode
To/from TWDR
Load data byte
Load data byte
Load data byte
Load data byte
Load data byte
Load data byte
No action
No action
No action
No action
No action
No action
No action
No action
Application Software Response
STA
X
X
X
X
X
X
0
0
1
1
0
0
1
1
STO
0
0
0
0
0
0
0
0
0
0
0
0
0
0
To TWCR
TWIF
1
1
1
1
1
1
1
1
1
1
1
1
1
1
AA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Next Action Taken by TWI Hardware
Last data byte will be transmitted and NOT
ACK should be received
Data byte will be transmitted and ACK should
be received
Last data byte will be transmitted and NOT
ACK should be received
Data byte will be transmitted and ACK should
be received
Last data byte will be transmitted and NOT
ACK should be received
Data byte will be transmitted and ACK should
be received
Switched to the not addressed Slave mode; no
recognition of own SLA or GCA
Switched to the not addressed Slave mode;
own SLA will be recognized; GCA will be
recognized if GC = “1”
Switched to the not addressed Slave mode; no
recognition of own SLA or GCA; a START
condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
own SLA will be recognized; GCA will be
recognized if GC = “1”; a START condition will
be transmitted when the bus becomes free
Switched to the not addressed Slave mode; no
recognition of own SLA or GCA
Switched to the not addressed Slave mode;
own SLA will be recognized; GCA will be
recognized if GC = “1”
Switched to the not addressed Slave mode; no
recognition of own SLA or GCA; a START
condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
own SLA will be recognized; GCA will be
recognized if GC = “1”; a START condition will
be transmitted when the bus becomes free
3706A–MICRO–9/09

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