AT89LP6440-20AU Atmel, AT89LP6440-20AU Datasheet - Page 27

• Manufacturer Part Number: AT89LP6440-20AU
• Description: MCU 8051 64K FLASH ISP 44TQFP
• Manufacturer: Atmel
• Series: 89LPr

Specifications of AT89LP6440-20AU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Package: 44TQFP
• Device Core: 8051
• Family Name: 89LP
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 38
• Interface Type: 2-Wire/SPI
• On-chip Dac: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 5-5.
5.2.2
5.2.2.1
3706A–MICRO–9/09
Symbol
DPU1
DPU0
DPD1
DPD0
SIGEN
DPS
DPCF = A2H
Not Bit Addressable
Bit
Data Pointer Operating Modes
Function
Data Pointer 1 Update. When set, MOVX @DPTR and MOVC @DPTR instructions that use DPTR1 will also update
DPTR1 based on DPD1. If DPD1 = 0 the operation is post-increment and if DPD1 = 1 the operation is post-decrement.
When DPU1 = 0, DPTR1 is not updated.
Data Pointer 0 Update. When set, MOVX @DPTR and MOVC @DPTR instructions that use DPTR0 will also update
DPTR0 based on DPD0. If DPD0 = 0 the operation is post-increment and if DPD0 = 1 the operation is post-decrement.
When DPU0 = 0, DPTR0 is not updated.
Data Pointer 1 Decrement. When set, INC DPTR instructions targeted to DPTR1 will decrement DPTR1. When cleared,
INC DPTR instructions will increment DPTR1. DPD1 also determines the direction of auto-update for DPTR1 when
DPU1 = 1.
Data Pointer 0 Decrement. When set, INC DPTR instructions targeted to DPTR0 will decrement DPTR0. When cleared,
INC DPTR instructions will increment DPTR0. DPD0 also determines the direction of auto-update for DPTR0 when
DPU0 = 1.
Signature Enable. When SIGEN = 1 all MOVC @DPTR instructions and all IAP accesses will target the signature array
memory. When SIGEN = 0, all MOVC and IAP accesses target CODE memory.
Data Pointer Select. DPS selects the active data pointer for instructions that reference DPTR. When DPS = 0, DPTR will
target DPTR0 and /DPTR will target DPTR1. When DPS = 1, DPTR will target DPTR1 and /DPTR will target DPTR0.
DPTR Redirect
DPCF
DPU1
7
– Data Pointer Configuration Register
The Dual Data Pointers on the AT89LP6440 include three additional operating modes that affect
data pointer based instructions. These modes are controlled by bits in DSPR.
The Data Pointer Redirect to B bit, DPRB (DSPR.0), allows MOVX and MOVC instructions to
use the B register as the data source/destination when the instruction references DPTR1 as
shown in
multiple operands from different RAM locations.
Table 5-6.
DPRB
DPU0
0
0
1
1
6
Table 5-6
DPS
MOVX @DPTR Operating Modes
0
1
0
1
DPD1
5
and
Table
A, @DPTR0
A, @DPTR1
A, @DPTR0
B, @DPTR1
MOVX
MOVX
MOVX
MOVX
DPTR
DPD0
4
5-7. DPRB can improve the efficiency of routines that must fetch
MOVX A, @DPTR
SIGEN
A, @DPTR1
A, @DPTR0
B, @DPTR1
A, @DPTR0
3
Equivalent Operation for MOVX
/DPTR
MOVX
MOVX
MOVX
MOVX
AT89LP6440 - Preliminary
0
2
@DPTR0, A
@DPTR1, A
@DPTR0, A
@DPTR1, B
MOVX
MOVX
MOVX
MOVX
DPTR
Reset Value = 0000 00X0B
MOVX @DPTR, A
–
1
@DPTR1, A
@DPTR0, A
@DPTR1, B
@DPTR0, A
DPS
/DPTR
MOVX
MOVX
MOVX
MOVX
0
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