AT89LP6440-20AU Atmel, AT89LP6440-20AU Datasheet - Page 119
AT89LP6440-20AU
Manufacturer Part Number
AT89LP6440-20AU
Description
MCU 8051 64K FLASH ISP 44TQFP
Manufacturer
Atmel
Series
89LPr
Specifications of AT89LP6440-20AU
Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
8K x 8
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Package
44TQFP
Device Core
8051
Family Name
89LP
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
38
Interface Type
2-Wire/SPI
On-chip Dac
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT89LP6440-20AU
Manufacturer:
Cirrus
Quantity:
89
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Figure 18-12. Format and States in Master Receiver Mode
18.6.3
3706A–MICRO–9/09
Successfull
reception
from a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
Slave Receiver Mode
From master to slave
From slave to master
08h
S
SLA
In the Slave Receiver mode, a number of data bytes are received from a master transmitter. To
initiate the Slave Receiver mode, TWAR and TWCR must be initialized as follows:
The upper seven bits are the address to which the Two-wire Serial Interface will respond when
addressed by a master. If the LSB is set, the TWI will respond to the general call address (00h),
otherwise it will ignore the general call address.:
TWAR
Value
TWCR
Value
R
MR
TWA6
A or A
DATA
X
–
40h
48h
38h
68h
A
A
A
78h
TWEN
Other master
Other master
TWA5
n
continues
continues
1
P
B0h
DATA
A
TWA4
Device’s own Slave Address
STA
0
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the Two-wire Serial Bus. The
prescaler bits are zero or masked to zero
TWA3
STO
50h
38h
To corresponding
states in slave mode
0
A
A
AT89LP6440 - Preliminary
Other master
DATA
continues
TWA2
TWIF
0
58h
A
TWA1
AA
1
10h
P
R
S
TWA0
–
X
SLA
GC
X
X
–
W
R
119
MT
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