AT89LP6440-20AU Atmel, AT89LP6440-20AU Datasheet - Page 45

• Manufacturer Part Number: AT89LP6440-20AU
• Description: MCU 8051 64K FLASH ISP 44TQFP
• Manufacturer: Atmel
• Series: 89LPr

Specifications of AT89LP6440-20AU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Package: 44TQFP
• Device Core: 8051
• Family Name: 89LP
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 38
• Interface Type: 2-Wire/SPI
• On-chip Dac: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.1.1
10.1.2
3706A–MICRO–9/09
Quasi-bidirectional Output
Input-only Mode
Port pins in quasi-bidirectional output mode function similar to standard 8051 port pins. A Quasi-
bidirectional port can be used both as an input and output without the need to reconfigure the
port. This is possible because when the port outputs a logic high, it is weakly driven, allowing an
external device to pull the pin low. When the pin is driven low, it is driven strongly and able to
sink a large current. There are three pull-up transistors in the quasi-bidirectional output that
serve different purposes.
One of these pull-ups, called the “very weak” pull-up, is turned on whenever the port latch for the
pin contains a logic “1”. This very weak pull-up sources a very small current that will pull the pin
high if it is left floating.
A second pull-up, called the “weak” pull-up, is turned on when the port latch for the pin contains
a logic “1” and the pin itself is also at a logic “1” level. This pull-up provides the primary source
current for a quasi-bidirectional pin that is outputting a “1”. If this pin is pulled low by an external
device, this weak pull-up turns off, and only the very weak pull-up remains on. In order to pull the
pin low under these conditions, the external device has to sink enough current to overpower the
weak pull-up and pull the port pin below its input threshold voltage.
The third pull-up is referred to as the “strong” pull-up. This pull-up is used to speed up low-to-
high transitions on a quasi-bidirectional port pin when the port latch changes from a logic “0” to a
logic “1”. When this occurs, the strong pull-up turns on for two CPU clocks quickly pulling the
port pin high. The quasi-bidirectional port configuration is shown in
Figure 10-1. Quasi-bidirectional Output
The input only port configuration is shown in
input includes a Schmitt-triggered input for improved input noise rejection. The input circuitry of
P3.2, P3.3, P4.2, P4.0 and P4.1 is not disabled during Power-down (see
fore these pins should not be left floating during Power-down when configured in this mode.
Figure 10-2. Input Only
From Port
Register
Input
Data
1 Clock Delay
(D Flip-Flop)
PWD
Figure
AT89LP6440 - Preliminary
Input
Data
PWD
10-2. The output drivers are tristated. The
V
Strong
CC
Port
Pin
V
Weak
Very
CC
Figure
Figure
10-1.
V
Weak
CC
10-3) and there-
Port
Pin
45