AT89LP6440-20AU Atmel, AT89LP6440-20AU Datasheet - Page 5

• Manufacturer Part Number: AT89LP6440-20AU
• Description: MCU 8051 64K FLASH ISP 44TQFP
• Manufacturer: Atmel
• Series: 89LPr

Specifications of AT89LP6440-20AU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Package: 44TQFP
• Device Core: 8051
• Family Name: 89LP
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 38
• Interface Type: 2-Wire/SPI
• On-chip Dac: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 1-1.
3706A–MICRO–9/09
TQFP
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
PLCC
Pin Number
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
AT89LP6440 Pin Description
PDIP
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
VQFN
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Symbol
GND
GND
P2.0
P2.1
P2.1
P2.3
P2.4
P2.5
P2.6
P2.7
P4.5
P4.4
P4.3
P0.7
P0.6
P0.5
P0.4
P0.3
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
Description
Ground
P2.0: User-configurable I/O Port 2 bit 0.
CCA: Timer 2 Channel A Compare Output or Capture Input.
A8: External memory interface Address bit 8.
P2.1: User-configurable I/O Port 2 bit 1.
CCB: Timer 2 Channel B Compare Output or Capture Input.
A9: External memory interface Address bit 9.
P2.2: User-configurable I/O Port 2 bit 2.
CCC: Timer 2 Channel C Compare Output or Capture Input.
A10: External memory interface Address bit 10.
DA-: DAC negative differential output.
P2.3: User-configurable I/O Port 2 bit 3.
CCD: Timer 2 Channel D Compare Output or Capture Input.
A11: External memory interface Address bit 11.
D+-: DAC positive differential output.
P2.4: User-configurable I/O Port 2 bit 5.
AIN0: Analog Comparator Input 0.
A12: External memory interface Address bit 12.
P2.5: User-configurable I/O Port 2 bit 5.
AIN1: Analog Comparator Input 1.
A13: External memory interface Address bit 13.
P2.6: User-configurable I/O Port 2 bit 6.
AIN2: Analog Comparator Input 2.
A14: External memory interface Address bit 14.
P2.7: User-configurable I/O Port 2 bit 7.
AIN3: Analog Comparator Input 3.
A15: External memory interface Address bit 15.
P4.5: User-configurable I/O Port 4 bit 5.
P4.4: User-configurable I/O Port 4 bit 4.
ALE: External memory interface Address Latch Enable.
Ground
P4.3: User-configurable I/O Port 4 bit 3.
DDA: Serial Data input/output for On-Chip Debug Interface when OCD is enabled and
the Crystal oscillator is selected as the clock source.
P0.7: User-configurable I/O Port 0 bit 7.
AD7: External memory interface Address/Data bit 7.
ADC7: ADC analog input 7.
P0.6: User-configurable I/O Port 0 bit 6.
AD6: External memory interface Address/Data bit 6.
ADC6: ADC analog input 6.
P0.5: User-configurable I/O Port 0 bit 5.
AD5: External memory interface Address/Data bit 5.
ADC5: ADC analog input 5.
P0.4: User-configurable I/O Port 0 bit 4.
AD4: External memory interface Address/Data bit 4.
ADC4: ADC analog input 4.
P0.3: User-configurable I/O Port 0 bit 3.
AD3: External memory interface Address/Data bit 3.
ADC3: ADC analog input 3.
AT89LP6440 - Preliminary
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