ATMEGA16HVA-4CKU Atmel, ATMEGA16HVA-4CKU Datasheet - Page 38

• Manufacturer Part Number: ATMEGA16HVA-4CKU
• Description: MCU AVR 16K FLASH 4MHZ 36-LGA
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16HVA-4CKU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 7
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 9 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 36-LGA
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRSB200, ATAVRSB201
• Minimum Operating Temperature: - 20 C
• On-chip Adc: 12 bit, 5 Channel
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.7.3
10.7.4
10.7.5
10.7.6
10.7.7
10.7.8
38
ATmega8HVA/16HVA
On-chip Debug System
Battery Protection
Voltage ADC
Coloumb Counter
Bandgap Voltage Reference
FET Driver
For analog input pins, the digital input buffer should be disabled at all times. An analog signal
level close to V
input buffers can be disabled by writing to the Digital Input Disable Register. Refer to
Digital Input Disable Register 0” on page 116
A programmed DWEN Fuse enables some parts of the clock system to be running in all sleep
modes. This will increase the power consumption while in sleep. Thus, the DWEN Fuse should
be disabled when debugWire is not used.
If one of the Battery Protection features is not needed by the application, this feature should be
disabled, see “BPCR – Battery Protection Control Register” on page 127. The current consump-
tion in the Battery Protection circuitry is only significant in Power-save mode. Disabling both
FETs will automatically disable the Battery Protection module in order to save power. The band-
gap reference should always be enabled whenever Battery Protection is enabled.
If enabled, the V-ADC will consume power independent of sleep mode. To save power, the V-
ADC should be disabled when not used, and before entering Power-save sleep mode. See
”Voltage ADC – 5-channel General Purpose 12-bit Sigma-Delta ADC” on page 112
V-ADC operation.
If enabled, the CC-ADC will consume power independent of sleep mode and keep the Slow RC
oscillator running. To save power, the CC-ADC should be disabled when not used, or set in Reg-
ular Current detection mode. See
ADC” on page 104
If enabled, the Bandgap reference will consume power independent of sleep mode. To save
power, the Bandgap reference should be disabled when not used as reference for the Voltage
ADC, the Coloumb Counter or Battery Protection. See
Sensor” on page 117
To minimize the power consumption in Power-save mode, the DUVR mode of the FET Driver
should be disabled to make sure that the Fast RC Oscillator is stopped.
REG
/2 on an input pin can cause significant current even in active mode. Digital
for details on CC-ADC operation.
for details.
”Coulomb Counter - Dedicated Fuel Gauging Sigma-delta
for details.
”Voltage Reference and Temperature
8024A–AVR–04/08
for details on
”DIDR0 –