ATMEGA16HVA-4CKU Atmel, ATMEGA16HVA-4CKU Datasheet - Page 39
![MCU AVR 16K FLASH 4MHZ 36-LGA](/photos/12/32/123221/36ck1-lga_sml.jpg)
ATMEGA16HVA-4CKU
Manufacturer Part Number
ATMEGA16HVA-4CKU
Description
MCU AVR 16K FLASH 4MHZ 36-LGA
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA16HVA-4CKU.pdf
(196 pages)
Specifications of ATMEGA16HVA-4CKU
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
7
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 9 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-20°C ~ 85°C
Package / Case
36-LGA
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRSB200, ATAVRSB201
Minimum Operating Temperature
- 20 C
On-chip Adc
12 bit, 5 Channel
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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- Download datasheet (3Mb)
10.8
10.8.1
10.8.2
8024A–AVR–04/08
Register Description
SMCR – Sleep Mode Control Register
PRR0 – Power Reduction Register 0
The Sleep Mode Control Register contains control bits for power management.
• Bits 7:4 – Res: Reserved Bits
These bits are reserved bits in the ATmega8HVA/16HVA, and will always read as zero.
• Bits 3:1 – SM2:0: Sleep Mode Select Bits 2, 1 and 0
These bits select between the four available sleep modes as shown in
Table 10-3.
• Bit 0 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
• Bit 7:6, 4 - Res: Reserved bits
These bits are reserved for future use. For compatibility with future devices, these bits must be
written to zero when PRR0 is written.
• Bit 5 - PRVRM: Power Reduction Voltage Regulator Monitor
Writing a logic one to this bit shuts down the Voltage Regulator Monitor interface by stopping the
clock of the module.
Bit
0x33 (0x53)
Read/Write
Initial Value
Bit
(0x64)
Read/Write
Initial Value
SM2
0
0
0
0
1
1
1
1
R
Sleep Mode Select
7
–
0
R
7
–
0
R
6
–
0
R
6
–
0
SM1
0
0
1
1
0
0
1
1
PRVRM
R/W
5
0
R
5
–
0
4
–
R
0
R
4
–
0
SM0
PRSPI
0
1
0
1
0
1
0
1
R/W
3
0
SM2
R/W
3
0
PRTIM1
R/W
ATmega8HVA/16HVA
2
0
SM1
R/W
Sleep Mode
Idle
ADC Noise Reduction
Reserved
Power-save
Power-off
Reserved
Reserved
Reserved
2
0
PRTIM0
R/W
SM0
R/W
1
0
1
0
Table
PRVADC
R/W
R/W
SE
0
0
0
0
10-3.
SMCR
PRR0
39
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