HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 110
HD6417706F133
Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417706F133V.pdf
(751 pages)
Specifications of HD6417706F133
Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
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Manufacturer:
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Section 3 Memory Management Unit (MMU)
3.3
3.3.1
The TLB caches address translation table information located in the external memory. The address
translation table stores the physical page number translated from the virtual page number and the
control information for the page, which is the unit of address translation. Figure 3.3 shows the
overall TLB configuration. The TLB is 4-way set associative with 128 entries. There are 32 entries
for each way. Figure 3.4 shows the configuration of virtual addresses and TLB entries.
Rev. 5.00 May 29, 2006 page 60 of 698
REJ09B0146-0500
Entry 31
Entry 0
Entry 1
Configuration of the TLB
TLB Functions
VPN(31–17)
Address array
Figure 3.3 Overall Configuration of the TLB
VPN(11, 10)
Ways 0 to 3
ASID(7–0)
V
Entry 31
Entry 0
Entry 1
PPN(31–10) PR(1, 0) SZ C D SH
Data array
Ways 0 to 3
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