HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 369

IC SUPERH MPU ROMLESS 176LQFP

HD6417706F133

Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417706F133

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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27
11.3
11.3.1
The WDT can be used to cancel software standby mode with an NMI or other interrupts. The
procedure is described below. (The WDT does not run when resets are used for canceling, so keep
the RESETP pin or RESETM pin low until the clock stabilizes.)
1. Before transitioning to software standby mode, always clear the TME bit in WTCSR to 0.
2. Set the type of count clock used in the CKS2 to CKS0 bits in WTCSR and the initial values for
3. Move to software standby mode by executing a SLEEP instruction to stop the clock.
4. The WDT starts counting by detecting the edge change of the NMI signal or detecting
5. When the WDT count overflows, the CPG starts supplying the clock and the processor
6. Since the WDT continues counting from H'00, set the STBY bit in the STBCR register to 0 in
When the TME bit is 1, an erroneous reset or interval timer interrupt may be generated when
the count overflows.
the counter in the WTCNT counter. These values should ensure that the time till count
overflow is longer than the clock oscillation settling time.
interrupts.
resumes operation. The WOVF flag in WTCSR is not set when this happens.
the interrupt processing program and this will stop the WDT. When the STBY bit remains 1,
the SH7706 again enters the standby mode when the WDT has counted up to H'80. This
standby mode can be canceled by power-on resets.
Operation
Canceling Software Standbys
WTCNT write
WTCSR write
Address: H'FFFFFF84
Address: H'FFFFFF86
Figure 11.2 Writing to WTCNT and WTCSR
15
15
H'5A
H'A5
Rev. 5.00 May 29, 2006 page 319 of 698
8
8
7
7
Section 11 Watchdog Timer (WDT)
Write data
Write data
REJ09B0146-0500
0
0

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