HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 349

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

DAR_2 continues being decremented regardless of whether the address reload function is on or
off.
As a result, the values in the DMAC are as shown in table 9.7 when the fourth transfer ends,
depending on whether the address reload function is on or off.
Table 9.7
Notes: 1. An interrupt is generated regardless of whether the address reload function is on or off,
9.6.2
In this example, DMA transfer is performed between the external memory specified with the
indirect address (transfer source) and the SCIF transmitter (transfer destination) using DMAC
channel 3. Table 9.8 shows the transfer conditions and register settings. In addition, the trigger of
the number of transmit FIFO data is set to 1 (TTRG1 = TTRG0 = 1 in SCFCR).
Items
SAR_2
DAR_2
DMATCR_2
Bus right
DMAC operation
Interrupt
Transfer request source flag
clear
2. The transfer request source flag is cleared regardless of whether the address reload
3. Specify the burst mode to use the address reload function. This function may not be
4. Set the value multiple of four in DMATCR_2 to use the address reload function. This
Example of DMA Transfer between External Memory and SCIF Transmitter
(Indirect Address on)
if transfers are executed until the value in DMATCR_2 reaches 0 and the IE bit in
CHCR_2 has been set to 1.
function is on or off, if transfers are executed until the value in DMATCR_2 reaches 0.
correctly executed in the cycle steal mode.
function may not be correctly executed if other values are specified.
Values in the DMAC after the Fourth Transfer Ends
Address reload on
H'04000080
H'003FFFF0
H'0000007C
Released
Stops
Not generated
Executed
Section 9 Direct Memory Access Controller (DMAC)
Rev. 5.00 May 29, 2006 page 299 of 698
Address reload off
H'04000090
H'003FFFF0
H'0000007C
Held
Keeps operating
Not generated
Not executed
REJ09B0146-0500