HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 201
HD6417706F133
Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417706F133V.pdf
(751 pages)
Specifications of HD6417706F133
Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
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Manufacturer:
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- Current page: 201 of 751
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7.2.11
BRSR is a 32-bit read register. BRSR stores the last fetched address before branch and the pointer
(3 bits) which indicates the number of cycles from fetch to execution for the last executed
instruction. BRSR has the flag bit that is set to 1 when branch occurs. This flag bit is cleared to 0,
when BRSR is read and also initialized by power-on resets or manual resets. Other bits are not
initialized by reset. Eight BRSR registers have queue structure and a stored register is shifted
every branch.
Bit
31
30 to 28
27 to 0
Branch Source Register (BRSR)
Bit Name
SVF
PID2 to
PID0
BSA27 to
BSA0
Initial Value
0
—
—
R/W
R
R
R
Description
BRSR Valid Flag
Indicates whether the address and the pointer by
which the branch source address can be
calculated. When a branch source address is
fetched, this flag is set to 1. This flag is cleared to
0 in reading BRSR.
0: The value of BRSR register is invalid
1: The value of BRSR register is valid
Instruction Decode Pointer
PID is a 3-bit binary pointer (0 to 7). These bits
indicate the instruction buffer number which
stores the last executed instruction before branch.
Even: PID indicates the instruction buffer number
Odd: PiD+2 indicates the instruction buffer
Branch Source Address
These bits store the last fetched address before
branch.
number
Rev. 5.00 May 29, 2006 page 151 of 698
Section 7 User Break Controller
REJ09B0146-0500
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