HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 200

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 7 User Break Controller
7.2.10
When the execution-times break condition of channel B is enabled, this register specifies the
number of execution times to make the break. The maximum number is 2
the break condition is satisfied, BETR is decremented by 1. A break is issued when the break
condition is satisfied after the BETR becomes H'0001.
Rev. 5.00 May 29, 2006 page 150 of 698
REJ09B0146-0500
Bit
3
2, 1
0
Bit
15 to 12 —
11 to 0
Execution Times Break Register (BETR)
Bit Name
SEQ
—
ETBE
Bit Name
—
Initial Value
0
All 0
0
Initial Value
All 0
All 0
R/W
R/W
R
R/W
R/W
R
R/W
Description
Sequence Condition Select
Selects two conditions of channels A and B as
independent or sequential.
0: Channels A and B are compared under the
1: Channels A and B are compared under the
Reserved
These bits are always read as 0. The write value
should always be 0.
The Number of Execution Times Break Enable
Enable the execution-times break condition only
on channel B. If this bit is 1 (break enable), a
user break is issued when the number of break
conditions matches with the number of execution
times that is specified by the BETR register.
0: The execution-times break condition is
1: The execution-times break condition is
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Number of execution times
independent condition
sequential condition
masked on channel B
enabled on channel B
12
– 1 times. Everytime