HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 223
HD6417706F133
Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417706F133V.pdf
(751 pages)
Specifications of HD6417706F133
Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
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Quantity
Price
Part Number:
HD6417706F133
Manufacturer:
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Quantity:
20 000
Company:
Part Number:
HD6417706F133V
Manufacturer:
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Quantity:
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Company:
Part Number:
HD6417706F133V
Manufacturer:
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Quantity:
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Part Number:
HD6417706F133V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
- Current page: 223 of 751
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Note:
8.4
The BSC has 11 registers. The synchronous DRAM also has a built-in synchronous DRAM mode
register. These registers control direct connection interfaces to memory, wait states and refreshes.
Refer to section 23, List of Registers, for more details of the addresses and access sizes.
Pin
60
61
62
63
64
65
66
67
68
Bus control register 1 (BCR1)
Bus control register 2 (BCR2)
Wait state control register 1 (WCR1)
Wait state control register 2 (WCR2)
Individual memory control register (MCR)
PCMCIA control register (PCR)
Synchronous DRAM mode register (SDMR)
Refresh timer control/status register (RTCSR)
Refresh timer counter (RTCNT)
Refresh time constant register (RTCOR)
Refresh count register (RFCR)
Signal
RFU
REG
BVD2
BVD1
D8
D9
D10
CD2
GND
* This LSI does not support WP.
Register Description
IC Memory Card Interface
I/O
I
O
O
I/O
I/O
I/O
O
Function
Reserved
Attribute memory
space select
Battery voltage
detection
Battery voltage
detection
Data
Data
Data
Card detection
Ground
Signal
INPACK
REG
SPKR
STSCHG O
D8
D9
D10
CD2
GND
I/O Card Interface
I/O
O
I
O
I/O
I/O
I/O
O
Rev. 5.00 May 29, 2006 page 173 of 698
Section 8 Bus State Controller (BSC)
Function
Input acknowledge —
Attribute memory
space select
Digital voice signal —
Card state
change
Data
Data
Data
Card detection
Ground
REJ09B0146-0500
SH7706 Pin
—
—
D8
D9
D10
—
—
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