HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 299

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

IRQOUT
IRQOUT
IRQOUT
IRQOUT Pin Assertion Conditions:
8.5.9
With this LSI, address pin pull-up can be performed when the bus is released by setting the PULA
bit in BCR1 to 1. The address pins are pulled up for a 4-clock period after BACK is asserted.
Figure 8.40 shows the address pin pull-up timing. Similarly, data pin pull-up can be performed by
setting the PULD bit in BCR1 to 1. The data pins should be pulled up when the data bus is not in
use. The data pin pull-up timing for a read cycle is shown in figure 8.41, and the timing for a write
cycle in figure 8.42.
CKIO
A25 to A0
BACK
When a memory refresh request has been generated but the refresh cycle has not yet begun
When an interrupt is generated with an interrupt request level higher than the setting of the
interrupt mask bits (I3 to I0) in the status register (SR). (This does not depend on the SR.BL
bit.)
Bus Pull-Up
Figure 8.40 Pins A25 to A0 Pull-Up Timing
Pull-up
Rev. 5.00 May 29, 2006 page 249 of 698
Section 8 Bus State Controller (BSC)
Hi-Z
REJ09B0146-0500