HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 461

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Clock: An internal clock generated by the on-chip baud rate generator or an external clock input
from the SCK0 pin can be selected as the SCI transmit/receive clock. The clock source is selected
by the C/A bit in SCSMR and bits CKE1 and CKE0 in the SCSCR. See table 14.9.
When the SCI operates on an internal clock, it outputs the clock signal at the SCK0 pin. Eight
clock pulses are output per transmitted or received character. When the SCI is not transmitting or
receiving, the clock signal remains in the high state. When only receiving, the SCI receives in 2-
character units, so a 16 pulse synchronization clock is output. To receive in 1-character units,
select an external clock source.
Transmitting and Receiving Data (SCI Initialization (clock synchronous mode)): Before
transmitting, receiving, or changing the mode or communication format, the software must clear
the TE and RE bits to 0 in SCSCR, then initialize the SCI. Clearing TE to 0 sets TDRE to 1 and
initializes the SCTSR. Clearing RE to 0, however, does not initialize the RDRF, PER, FER, and
ORER flags and SCRDR, which retain their previous contents.
Figure 14.18 is a sample flowchart for initializing the SCI.
Set transmit/receive format in SCSMR
and set RIE, TIE, TEIE, and MPIE bits
Clear TE and RE bits in SCSCR to 0
Set TE and RE bits in SCSCR to 1
Set RIE, TIE, TEIE, MPIE, CKE1,
Figure 14.18 Sample Flowchart for SCI Initialization
and CKE0 bits in SCSCR
Set value in SCBRR
(TE and RE are 0)
period elapsed?
Has a 1-bit
Initialize
End
Yes
Wait
No
Section 14 Serial Communication Interface (SCI)
1.
2.
3.
4.
Select the clock source in the
SCSCR. Leave RIE, TIE, TEIE,
MPIE, TE and RE cleared to 0.
Select the communication format
in the SCSMR.
Write the value corresponding to
the bit rate in SCBRR unless an
external clock is used.
Wait for at least the interval
required to transmit or receive
one bit, then set TE or RE in the
SCSCR to 1. Also set RIE, TIE,
TEIE and MPIE. Setting TE and
RE allows use of the TxD0 and
RxD0 pins.
Rev. 5.00 May 29, 2006 page 411 of 698
REJ09B0146-0500