WG82577LM S LGWS Intel, WG82577LM S LGWS Datasheet - Page 15

• Manufacturer Part Number: WG82577LM S LGWS
• Manufacturer: Intel

Specifications of WG82577LM S LGWS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Interconnects—82577 GbE PHY
2.3.1.6
2.4
2.4.1
2.4.2
SMBus ARP Functionality
The 82577 doesn’t support ARP protocol.
Transitions between SMBus and PCIe interfaces
Switching from SMBus to PCIe
Communication between the MAC and the 82577 is done through the SMBus each time
the system is in a low power state (Sx); PE_RST_N signal is low. The MAC/PHY
interface is needed to enable host wake up from the 82577.
Possible states for activity over the SMBus:
While in this state, the SMBus is used to transfer traffic, configuration, control and
status between the MAC and the 82577.
The switching from the SMBus to PCIe is done when the PE_RST_N signal is high.
Switching from PCIe to SMBus
The communication between the MAC and the 82577 is done through PCIe each time
the system is in active power state (S0); PE_RST_N signal is high. Switching the
communication to SMBus is only needed to enable host wake up in low power states
and is controlled by the Intel® 5 Series Express Chipset.
The switching from PCIe to SMBus is done when the PE_RST_N signal is low.
1. After power on (G3 to S5).
2. On system standby (Sx).
• Any transmit/receive packet that is not completed when PE_RST_N is asserted is
• Any in-band message that was sent over the SMBus and was not acknowledged is
• Any transmit/receive packet that is not completed when PE_RST_N goes to 0b is
• Any in-band message that was sent over PCIe and was not acknowledged is re-
discarded.
re-transmitted over PCIe.
discarded.
transmitted over SMBus.
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