WG82577LM S LGWS Intel, WG82577LM S LGWS Datasheet - Page 43

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WG82577LM S LGWS

Manufacturer Part Number
WG82577LM S LGWS
Description
Manufacturer
Intel
Datasheet

Specifications of WG82577LM S LGWS

Lead Free Status / RoHS Status
Supplier Unconfirmed
Device Functionality—82577 GbE PHY
Note:
7.4.1
Setting the 82577’s wake up:
Once wake up is enabled, the 82577 stops responding to SMBus commands.
Host wake up:
The 82577 keeps and forwards the wake up packet. When a wake up packet is
identified, the wake up in-band message is sent and the host should clear the
Host_WU_Active bit (bit 4) in the Port General Configuration register (page 769,
register 17). As a result, the 82577 resumes transmitting the packet. Each time this bit
is set and if a wake up in-band message has already sent, any new packets received
does not overwrite the packet in the FIFO. The 82577 re-transmits the wake up in-band
message after 50 ms if no change in the Host_WU_Active bit occurred.
Host Wake Up
The 82577 supports two types of wake up mechanisms:
1. Clear the Host_WU_Active bit (bit 4) in the Port General Configuration register
2. Set bit 2 (MACPD_enable) of the Port Control register (page 769, register 17) to
3. Set the Slave Access Enable bit (bit 2) in the Receive Control register (page 800,
4. Configure the 82577’s wake up registers per ACPI/APM wake up needs.
5. Clear the Slave Access Enable bit (bit 2) in the Receive Control register (page 800,
6. Set the Host_WU_Active bit (bit 4) in the Port General Configuration register (page
1. When a WoL packet/event is detected, the 82577 sends an in-band message to the
2. The Intel
3. The host should issue an PHY reset to the 82577 before clearing the Host_WU_Active bit.
4. Host reads the Wake Up Status (WUS) register; wake up status from the 82577).
• Advanced Power Management (APM) wake up
• ACPI Power Management wake up
(page 769, register 17) to enable wake up mode.
enable the 82577 wake up capability and software accesses to page 800.
register 0) to enable access to the Flex Filter register, if setting those bits is needed
in the next stage. The registers affected are:
a. Flexible Filter Value Table LSB– FFVT_L (filters 01)
b. Flexible Filter Value Table MSBs – FFVT_H (filters 23)
c.
d. Flexible TCO Filter Value/Mask Table LSBs – FTFT_L
e. Flexible TCO Filter Value/Mask Table MSBs – FTFT_H
register 0) to enable the flex filters.
769, register 17) to activate the 82577’s wake up functionality.
Intel® 5 Series Express Chipset indicating a host wake up.
Flexible Filter Value Table - FFVT_45 (filters 45)
®
5 Series Express Chipset wakes the host.
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