WG82577LM S LGWS Intel, WG82577LM S LGWS Datasheet - Page 6

• Manufacturer Part Number: WG82577LM S LGWS
• Manufacturer: Intel

Specifications of WG82577LM S LGWS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Revision History
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June 2010
February 2010
November 2009
October 2009
June 2009
May 2009
April 2009
March 2009
Feb 2009
Sept 2008
Date
2.4
2.3
2.2
2.1
2.0
1.75
1.2
1.1
1.0
0.95
Revision
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Update title page.
Updated section 10.3.1.10 (bit 13 description).
Added new section 12.4.2 (3.3 Vdc I/O; JTAG).
Removed old section 8.
Updated section 10.3.1.11 (bit 12 and 13 desctiptions).
Updated figure 1.
Updated table 2.
Updated section 7.4 and 10.3.1.2 (added Intel
Added power sequencing note to section 5.3.2.
Updated section 6.4.2.2 (added Windows* 7 reference).
Updated sections 7.4.1.3.1.4 through 7.4.1.3.1.7 and 7.4.1.3.2.1 through 7.4.1.3.2.2 (swapped Possible
VLAN Tag and Possible Len/LLC/SNAP Header in the tables).
Added Port Control register (Page 769, Register 16).
Updated section 10.3.1.15 (LED behaviour).
Updated power consumption targets in section 6.
Updated the NVM format and contents to match current NVM image.
Added a PHY functionality section.
Updated the recommended operating conditions in section 12.
Changed the crystal Cload value from 27 pF to 33 pF.
Updated oscillator specification table and added a note for the oscillator schematic.
Updated table 6.
Initial public release.
Major revision (all sections).
Updated title page (advanced cable diagnostics).
Added new Section 2.5 (Intel
Added new Appendix A, B, and C.
Updated section 11 (crystal drive level).
Update table 2.
Updated title page and product matrix in section 1.
Corrected Epad size values (changed 3.80 mm to 4.3 mm).
Removed 82574L references.
Added notes to section 6.1 (power calculations).
Changed fully integrated linear regulator voltage from 1.1 Vdc to 1.0 Vdc (all sections).
Added SMBus specification reference to section 1.5.
Updated pad size in section 4.1.
Added new power consumption targets in Table 7.
Changed internal pin name from LAN_PWR_GOODn to LAN_DISABLE_N (all sections).
Updated Section 6.3.1.1 (added power consumption value during power up).
Added new Section “Device Functionality”.
Added new Section “MAC Programming Interface”.
Section 2.2.2 (Removed last paragraph and Table 2).
Section 2.3 (changed SMBCLK to SMB_CLK and SMBDATA to SMB_DATA).
Section 2.3.1 (updated paragraph).
Section 2.3.1.6 (removed).
Removed old sections 2.3.1.6.1, 2.3.1.6.2, and 2.3.1.7).
Section 2.3.2.2.1 (updated table).
Section 4.1 (added new mechanical drawing).
Section 5.3.2 (changed T
Section 6.1 (removed note 2 from Table 7).
Section 6.3.1.1 (updated paragraph).
Section 6.3.1.2 (removed all mode 1 references and updated register references).
Section 6.3.1.3 (added K1 Idle State information).
Section 6.3.1.5 (removed)
Section 6.3.2 (changed KX to K0).
Section 6.3.3 (updated register references).
Section 7.3.1.1 (updated operational range values).
Section 7.3.1.2 (updated operational range value).
Removed Section 7.3.2 “Power On/Off Sequence”.
Section 7.3.1.4, Table 127 (updated power detection threshold values).
Section 7.4.1 (updated Ipullup values).
Section 7.4.2 (updated VOL, VOH, and Ipullup values).
Section 7.4.3 (updated Ipullup values).
Section 7.4.4.1 (Updated table and added transmitter eye diagram).
Section 7.4.4.2 (Updated table and added receiver eye diagram).
Removed old Section 7.4.4.3.
Section 7.6.3 (updated paragraph).
Section 7.7 (updated coupling capacitor values in Table 129. changed XTAL1 input value to 3.6 Vdc).
Section 7.6.1 (updated input clock amplitude values).
XTAL
®
parameter to 35 ms).
5 Series Express Chipset/82577 – SMBus/PCIe Interconnects).
®
5 Series Express Chipset references).
82577 GbE PHY—Datasheet